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ADS1274: ADS1274 sampling timing point in FrameSync Format timing

Kevin Wen
Intellectual 2235 points

Part Number: ADS1274

Hi team,

In ADS1274 datasheet, P25 Figure 68, shows a Analog input circuit S1 and S2 Switch Timing. would you please suggest the relationship between this input timing and ADS1274's Frame Sync Format timing (P9)? in the other word, if we have got a output data in frame sync format, how long is the delay between the input analog voltage sampleed and data outputed?

thanks.

Kevin

  • 0
    TI__Guru 67876 points
    Hi Ken,

    The modulator sampling timing shown in Figure 68 is simply an approximation of the of the analog input sampling circuitry. It is not really indicative of any precise timing requirements that the user needs to be aware of.

    It sounds like the real concern is with calculating the total delay from input sample to output data word. This is listed in the Electrical Characteristics table as "Group Delay." The group delay in the ADS1274/78 is dependent on the modulator sampling frequency and the MODE setting. This delay will be consistent across frequency as the digital filter is a linear phase FIR filter. Also, the group delay will be the same for both SPI and Frame-Sync interfaces.

    Let me know if you have any other questions about this.

    Best Regards,