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ADC12D1800RF: I have a question about using adc

Cho junhee
Intellectual 330 points
Part Number: ADC12D1800RF
Other Parts Discussed in Thread: ADS4149EVM, ADC12D500RF

HI, this is Jun Hee Cho. 

I have some questions. 

Before I ask a question

First, I will briefly explain the application we are going to develop.
We want to find bio-signals wirelessly through RF signals through antenna and convert the datas using ADCs.

The center frequency of the signal I use is 3 ~ 5GHz and I am looking for an ADC with a bandwidth of 3GHz or more.

The input signal has a pulse repeating frequency (PRF) of 1 M to 10 MHz.

I was looking for a product called ADC12D1800RF.

It has a maximum bandwidth of 4 GHz and a minimum sampling frequency of 500 MHz.

We use a PRF of 1M to 10MHz, and wonder if the ADC's input does not operate at all if the input is less than 500MHz.

If so, I know that the ADC has a driver circuit that receives the CLOCK signal. I wonder if this driver circuit does not work if a CLOCK signal of 500MHz or less is input.

In addition, if there is an ADC that meets these specifications, I want to know what it is. I would like to know if there is an FPGA that can transfer the ADC's output data to a PC.

PS. I am already using the ADS4149EVM and the minimum sampling clock signal on this board is 20MHz. But I use it at 1MHz ~ 20MHz. Because of this fact, I asked the above question.

thanks. 

  • 0
    TI__Mastermind 44560 points

    Hi Jun Hee

    The ADC12D1800RF device can operate to a minimum sample rate of 150 MSPS when operated in dual input mode. If you want to use the ADC at a low sample rate I would recommend the ADC12D500RF. It has the same input bandwidth as the ADC12D1800RF, but will have lower power consumption and slightly better performance at that low sample rate. If you are planning to design your own board the ADC12D500RF would be the best choice in this product family.

    If you are planning to use an EVM, the FPGA firmware design may limit the low speed captures to some level above 150 MSPS.

    All of the ADCs mentioned above can convert signals from DC to beyond 3 GHz. The input signal path can be DC-coupled or AC-coupled as needed for your application.

    If your pulse repetition rate is 1MHz to 10MHz I would recommend designing your system to run the ADC continuously at a sample rate that is officially supported by that device, but only storing or processing data when the pulses are occurring. This will give the best ADC performance and better time resolution in the data captured during the pulses.

    I hope this is helpful.

    Best regards,

    Jim B

  • 0 in reply to Jim Brinkhurst1
    Intellectual 330 points
    Thank you very much for your reply.

    I will ask you some questions.
    In the data sheet of the ADC12D500RF that you recommended, the minimum sampling clock frequency is 150MHz (in non-DES mode). This specification is the same as the ADC12D1500RF I mentioned before with the minimum sampling clock frequency. But why do you recommend it to be suitable for use on the system I want to use?

    I would like to input the clock frequency from 1M to 10MHz.
    Of course, the ADS4149EVM that we used previously had a minimum sampling clock frequency of 20MHz, but it could operate at 1MHz clock frequncy.
    Can I use the ADC12D500RF I recommend at 1MHz or 5MHz clock frequency? If so, I will use this product for granted.

    Next is the question about FPGA.

    In order to implement my system mentioned above, is it better to use a different board or product than to use an FPGA? Like embedded system?

    I want to continuously capture a minute of signal and send this data to the PC automatically. How do you think it is appropriate to configure the system and buy the product?

    Thank you very much for reading to the end.

    Have a nice day.

    Cho Junhee
  • 0 in reply to Cho junhee
    TI__Mastermind 44560 points

    Hi Cho Junhee

    If your input signal is 3 to 5 GHz, and you are planning to sample at only 1 to 10 MHz, you will be under-sampling by a very large amount. In this fashion you will be able to get some information about the amplitude of the signal, but no information about the frequency. Is this what you are intending? Is any aspect of the timing or frequency of the signal important?

    In any case, if you are looking for a turn-key solution that can capture the 3 to 5 GHz signal at low sample rates and with large record duration, and automatically send this to the PC you should investigate off the shelf digitizer products. There are a lot of different companies to consider and I'm sure some have a product close to what you need. Some oscilloscope products might even be capable of this.

    Our ADC evaluation tools are not intended to work in the fashion that you are looking for. Neither the ADS4149EVM or ADC12Dxx00RFRB evaluation tools can accomplish what you need.

    If you are designing your own digitizer board using an ADC and FPGA, etc. then I would recommend the following architecture:

    1. ADC + FPGA + RAM for data capture and storage. 
    2. Embedded controller for management of the capture system and to send the stored data to the PC.

    To get an ADC with the required input bandwidth you will likely need to operate the ADC at a higher sample rate, and decimate inside the FPGA to reduce the sample rate to whatever rate you need for the application before storing the information to memory.

    Best regards,

    Jim B