DAC39J84EVM: DAC39J84 EVM SW error for JESD config 8411

Mark Elkin

Part Number: DAC39J84EVM
Other Parts Discussed in Thread: DAC39J84, LMK04828

We are using the above DAC39J84 EVM and the TI software for this EVM.

We designed our system around the 8411 JESD setting, which the DAC39J84 datasheet indicates is a valid configuration. However, the eval board SW flags this as an illegal configuration.

We'd like to know if this is a legal configuration or not, and what we can do to fix it. Our selection of 1966.8 MHz sampling rate and the 16 interpolation are fixed. For the rest we are somewhat flexible.

Here is a snapshot of the eval SW message indicating that 8411 is illegal. (Red "Quick Start Message" near bottom, and red status field at the bottom.)

over 8 years ago

0 jim s over 8 years ago

TI__Guru* 91947 points

Mark,

Due to the fact the board uses a 122.88MHz VCXO with the LMK device, there are only certain frequencies that can be used when selecting Onboard clocking mode. You have two options to use your frequency:

1. Change out the VCXO.

2. Use external clock mode and provide a 1966.8MHz clock to the board.

Regards,

Jim

0 Mark Elkin over 8 years ago in reply to jim s

Prodigy 170 points

Thanks Jim. We will check this out.

0 Mark Elkin over 8 years ago in reply to Mark Elkin

Prodigy 170 points

Our team found an answer. They did use a different input frequency, 491.52MHz, which was 4 x 122.88MHz.
But this was accomplished by reprogramming the onboard LMK04828 clock generator and so an external clock was not required.

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DAC39J84EVM: DAC39J84 EVM SW error for JESD config 8411