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ADS1255 data reading problem

Other Parts Discussed in Thread: ADS1255

Dear Friends,

I am using ADS1255 with ATmega32. I am using linux OS and GCC compiler for this purpose. I am right now using single shot mode acoording to datasheet.

Now what my problem is, I am getting DRDY pin change but after RDATA command I am not getting data on Dout pin.

My command sequence is as follows:

First i m sending WAKEUP command .... ads1255 responds to it and DRDY signal goes low ... after that i send RDATA command and wait for data on DOUT line. But no data is outputed on Dout pin.

I am using all default settings, i.e: fdata = 30ksps, all default values in registers, no mux, AVdd = 5v, DVdd = 3.3v, VrefP = 2.5v, VinP = +5v and VinN = Gnd. My connections of Ads1255 are exactly as shown in Datasheet of ads1255 pg.28 fig.25. SCLK = 2Mhz.

code:


SIGNAL(SIG_INTERRUPT2) // from drdy'
{
// This is DRDY' event go high - SYNC
// transmit sync command @ MOSI
PORTB = (0<<PB4);
_delay_ms(1);
SPDR = 0xFC;
while(!(SPSR & (1<<SPIF)));
PORTB = (1<<PB4);
}

SIGNAL(SIG_INTERRUPT0) // from drdy'
{
// This is DRDY' event
// transmit command @ MOSI
PORTB = (0<<PB4);
 _delay_ms(1);
SPDR = 0x01;
while(!(SPSR & (1<<SPIF)));
PORTB = (1<<PB4);
}

SIGNAL(SIG_INTERRUPT1)  // ext interrupt
{
// This is external event
// transmit command @ MOSI
PORTB = (0<<PB4);
 _delay_ms(1);
SPDR = 0xff;
while(!(SPSR & (1<<SPIF)));
PORTB = (1<<PB4);
}

int main(void)
{
// initialization of spi
DDRB = (1<<DDB4)|(1<<DDB5)|(1<<DDB7);
SPCR = (1<<SPE)|(1<<MSTR)|(1<<CPHA);
SPSR = (1<<SPI2X);
PORTB = (1<<PB4);
//initialize ext int0 and int1
DDRD = (0<<INT0)|(0<<INT1); //making sure int0 is input
DDRB = (0<<INT2);
MCUCR = (1<<ISC01)|(1<<ISC11); //interupt on falling edge of
MCUCSR = (1<<ISC2);
GICR = (1<<INT0)|(1<<INT1)|(1<<INT2);

sei();
for(;;)
{}
return 0;
}

  • Hi Hiran, 

    The first thing that you need to do is verify that the polarity of your communication is correct. If your polarity is incorrect and you are reading/ writing on the wrong edge of SCLK, you will not be getting valid data (if any data at all). In the ADS1255/56, the falling edge of SCLK is the critical edge, see page 6 of the data sheet. Therefore, make sure that the data is set to change on the rising edge so it is valid on the falling edge to be latched into the converter. Make sure that you are meeting the t6 timing requirement which is Delay from last SCLK edge for DIN to first SCLK rising edge for DOUT. 

    Regards,

    Tony Calabria