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RTOS/TLV5614: Not able to get DAC output from TLV5614

Part Number: TLV5614
Other Parts Discussed in Thread: TMS320F28335

Tool/software: TI-RTOS

Hi

Team

We are trying to use DAC TLV5614 as mentioned

We have using this as external DAC with TMS320F28335 interfaced from SPI

our SPI code works fine and we are able to send data on MOSI lines when probed.

The dac is interfaced with the following voltages as mentioned

DVDD &PD is 1.2V

Ref in AB is 1.2v

Ref in CD 1.2v

AVDD is 5V

and we have made sure the values that we send is proper on MOSI lines and made sure LDAC and CS pin are low

As suggested we are sending the frame format of  A0 AI PWR AND SPD

and we are sending data

But there is no Analog output seen and the all channels remains low

Not sure why we are not able to get any ANALOG VOLTAGES ON ANY CHANNEL

Kindly let me know the debugging step or any reference code that is used to drive the DAC

Kindly suggest the solution

Thank you

Deepak R  

  • Hi
    Team
    Kindly pls reply regarding this
    I have checked all signals and timing as per datasheet and made sure LDAC and CS pin are low
    Let me know any changes or debug steps

    Thank you
    Deepak R
  • Hi
    Team
    REPLY PLEASE
    Kindly let me know what changes should be used to debug the DAC working.

    Thank you
    Deepak R
  • Deepak,

    This is a somewhat old part so the datasheet format is a bit tricky to follow and I'm not as deeply familiar with the part as I am with most of our DAC portfolio, but I do see some potential issues.

    The first page of the datasheet indicates that DVDD and AVDD should be supplied by voltages between 2.7V and 5.5V. Since you are using a 1.2V DVDD, the digital core may not be turned on. I would suggest you modify the supply voltage to 2.7V and see if your results improve.

    The absolute maximum ratings on page 3 also indicate a supply voltage difference absolute maximum of -2.8V to 2.8V for the difference between DVDD and AVDD supplies. Using 1.2V DVDD with 5V AVDD violates this with 3.8V difference between the two rails.

    I would suggest modifying the DVDD supply voltage as the first debug vector. If this does not rectify the problem it would be helpful to be able to see an oscilloscope capture of the digital lines to validate the timing and clock phase / polarity settings.
  • Hi

    Kevin

    Thanks for the reply I would try this and update the results !

    Thank you

    Deepak R