DAC37J84: NCO phase setting

TTD,

You can write the update values without interrupting the NCO or DAC sampling of data, then do a SYNC to load these register values into the accumulator when ready, which will cause a brief phase interruption.

The NCO requires three 16-bit register writes to set the frequency. Upon writing the last of these registers an autosync is generated to deliver the entire field to the NCO block at once, rather than in pieces after each individual register write.

For a field that spans multiple registers, all non-AUTOSYNC registers for the field must be written first before the actual AUTOSYNC register.

You can use SYSREF to reset the NCO and synchronize it at a specific time, but there may be limitations on time resolution (e.g. Fs/8 resolution). You would need to preload the next NCO frequency information into the DAC using SPI. You can then trigger the NCO frequency update using SYSREF. Upon receiving SYSREF (and after some propagation delay within the DAC) the NCO accumulator will be set to 0 (reset) and the new frequency word will be used. So the phase upon updating the NCO frequency is reset to zero, not continuous. Since there will be a delay from SYSREF coming into the DAC to when the NCO is reset, the SYSREF would have to be triggered before the desired frequency change.

The SPI write may be quicker if you only use 16-bits (1 SPI register), which may be sufficient if you stick to 100 MHz increments. Then it would require one SPI register write and two SYSREF pulses (NCO frequency is double buffered). One SPI register will require 24 SPI clocks, which is 2.4 us. The SYSREF propagation delay may add another 100 ns or so (don't have exact number). So you're looking at somewhere around 3 us of switching time.

Regards,

Jim