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ADC12D1800RFRB: adc12d1800

Madhusri Ghosh
Prodigy 50 points

Part Number: ADC12D1800RFRB

Hi

I am using ADC12D1800RFRB  Evaluation Board.

I have configure the on board PLL for 1.8 GHz clock...So  I am sending sampling frequency 1.8GHz  to adc.

I have configured the adc as following:

NDM <= '1';  (non demux mode)
DES <= '0';   (non DES mode)
DDRPHASE <= '0';
TPM <= '0';
PDQ <= '1';
ECE <= '0';    (non ECM mode)
CALDLY <= '1';
FSR <= '1';
PDI <= '0';

Also sending CAL signal (low to high to low) for power on calibration.

Analog input signal specifications : 210 MHz; 0.7 mV (p-p)

But I am not getting the output data clock from adc..(I am checking at chipscope)...What may be the possible issues??

Please help...Urgent

  • 0
    TI__Mastermind 44680 points

    Hi Madhusri

    The FPGA on the ADC12D1800RFRB can only capture data when the ADC is in 1:2 Demux mode (output data rate = 900 Mbit/sec). In non-Demux mode the data rate will be 1800 Mbit/sec which is too fast for the FPGA to capture. The data clock will also be too fast (900 MHz instead of 450 MHz) which I expect is the reason the clock is not recognized on chipscope.

    Try configuring the board with NDM = 0 instead and see if things work better.

    Best regards,

    Jim B