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ADS1278: spi read not stable with SCLK

Jian Chen94
Intellectual 505 points
Part Number: ADS1278

Hi,

I am using MCU to read ADS1278, I set CLK as 24MHz, and set SCLK the same as CLK, the read is OK.  Then I set SCLK as 6MHz, the reading is jumping up and down, I need to make it work at 6MHz.  I set mode FORMAT[2:0] of 000, MODE[1:0] as 01(high resolution), CLKDIV as 1.

What is the reason?

Thanks, Jian

  • 0
    TI__Guru 66466 points

    Hello Jian,

    The problem you are noticing is that your SCLK is not fast enough to read all the data from the ADS1278. In High-Resolution Mode, the fCLK / fDATA ratio is 512, so your output data rate is 46.875kSPS. This means you'll have 21.2us (tDATA minus tDS) to read all 8ch X 24 bits = 192 bits.

    I'm assuming that you are still reading all 8 channels, even though you are using TDM Dynamic Position, which removes powered-down channels from the data stream. For 8 channels, a 6MHz SCLK would take 32us to read all this data, which is too long. By my calculations, you will need a minimum SCLK of about 9.1MHz.

    Best Regards,