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ADS127L01: configuration by hardware pins

Part Number: ADS127L01
Other Parts Discussed in Thread: ADS1271, ADS1274

Hello,

 

In the datasheet of the ADS127L01 there is a remark for following pins:

 

12           FILTER1

13           FILTER0

14           FSMODE

15           OSR1

16           OSR0

29           HR

30           FORMAT

 

(2) Pull the hardware mode pins high to DVDD or low to DGND through 100-kΩ resistors.

 

In the evaluation board it is possible to connect these inputs to logic outputs of other components.

So there is no 100kOhm resistor in series for that application.

 

My questions are:

Why are these 100kOhm resistors necessary?

Is it allowed to connect these inputs directly to DVDD or DGND for defining logical levels?

 

According to the absolute maximum ratings the direct connection of these logic inputs to DVDD or GND is no problem.

Also according the recommended operation conditions the direct connection of these logic inputs to DVDD or GND is no problem.

 

 

Best regards

 

Kaufmann Friedrich

  • Hello Friedrich,

    Thanks for bringing this to our attention.

    The recommendation for using pull-up and pull-down resistors on the ADS127L01 is to provide protection from momentary currents which could damage the device. During normal operation, we do not expect the Hardware Mode pins to draw much current at all. MCU GPIO pins or level translators can connect directly to the ADS127L01 because their drive capability is generally very limited.

    However, if you were pulling these pins directly to the supplies (DVDD or GND), there can be some undefined conditions during power-up, or following a supply glitch, which would pass intolerable amounts of current into/out of the ADS127L01. The continuous current limit is only +/-10mA.

    I understand that we did not follow such recommendations on the EVM. Instead we have the Hardware Mode pins tied to bidirectional switches, which present very low ON resistance. Depending on the /OE settings, the other side of the bidirectional switches is connected to a pull-up/down for on-board control or to the level translator outputs for MCU control. In the event that the user selects on-board control, there is only protection on the pull-up side to DVDD through the 100k resistor pack. If the respective SPDT switches are closed, the Hardware Mode pins are tied directly to GND with no protection. This does contradict our recommendation in the datasheet and is misleading. Thankfully, the EVM itself is a much simpler and well-controlled system, posing a low risk to device damage.

    In a real-world application, I would strongly suggest using a series pull-up or pull-down resistor on each of the Hardware Mode pins, or tying them directly to your MCU GPIOs.

    Best Regards,
  • Hello Ryan,

    thank you for your answer!

    The minimum series resistor is 3.3V / 10mA = 330Ohm.
    I will use 10kOhm series resistors.

    If you make any revision of the chip of the ADS127L01 perhaps you can include some series resistors at that seven configuration pins, so the user can connect these pins directly to DGND or DVDD. If you use a low resistance value, there will be no timing problems for changing any configuration mode.

    Perhaps you use this configuration pins for testing the chip ADS127L01 in a mode, which is no available for the user, and this series resistors are not allowed for that tests.....


    I used the ADS1274 and the ADS1271 in other applications and for that ADCs no series resistors are necessary for hardware configuration pins.
    I can connect these pins directly to DGND or DVDD.


    Best regards,

    Kaufmann Friedrich