ADS5294EVM: How to use BUFIO for forwarding Bit Clock to IDDR.

Hammad Rehman

Part Number: ADS5294EVM

Hi, I am working on High Speed Serial LVDS ADC data capture. I have read

this guide. In this guide on page number 10 Figure 3-1. it is shown that BUFIO should be used after IDELAY to forward Bit clock to IDDR. but when I use BUFIO I receive error during routing.

Error: "[DRC 23-20] Rule violation (RTSTAT-1) Unrouted net - 1 net(s) are unrouted. The problem bus(es) and/or net(s) are design_1_i/iddr2_ip_0/inst/cBufferedIO." I am using Zedboard (XC7Z020) as my FPGA. Please help me to resolve the issue.

And Is it necessary to use BUFIO here or not?

Regards

over 8 years ago

0 Praveen Aroul over 8 years ago

TI__Mastermind 49916 points

Hello Hammad,

We have received your inquiry. We do not have experience working with Xilinx ZYNQ FGPA.
We are checking with the software team if they could provide some guidance on resolving the error.
Based on the document, an alternate way to achieve the delay is using the phase locked loops (PLLs).
Have you tried using the PLL?

0 Hammad Rehman over 8 years ago in reply to Praveen Aroul

Prodigy 30 points

Hello Praveen,

I haven't tried the PLL solution. I have requirement to us DELAYS so I have to solve the problem using Delays only.

Regards

Data converters

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ADS5294EVM: How to use BUFIO for forwarding Bit Clock to IDDR.