This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DAC38RF83: SYNC0 and SYNC1 Pins and Purpose

Part Number: DAC38RF83

The data sheet for the DAC38RF83 states "Synchronization request to transmitter for JESD204B link 0, LVDS positive output." but what does that mean?

We are trying to figure out where we are to connect these pins.

Are these pins connected to our FPGA or can we connect them to our microcontroller?

We would like an expanded explanation of these pins.

Thank you.

  • Randy,

    What this means is that SYNC is an active low signal. When the DAC powers up, it will set the SYNC low (SYNC0 if only using one link with one SYNC), telling the transmitter (FPGA usually) to start sending data to the DAC, to start the CGS sequence of the JESD204B interface.Once  the DAC has established CGS on all lanes being used, it will send SYNC high to instruct the transmitting device to stop sending the K28.5 characters and enter into the ILS sequence. So whatever is sending the data to the DAC will need to have this SYNC connected to it.

    The DAC has an option where can it be used as two totally separate links. In this case, link0 would use SYNC0 and link1 would use SYNC1.

    Regards,

    Jim