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ADS1298: Calibration through external reference signal

Rudy Rigoni
Prodigy 110 points
Part Number: ADS1298

Hi,

we would like to implement an external calibration within our 8-channels ECG device. The normative EN 60601-2-47 requires 1.0 ± 0.05 mV at the ECG inputs. To do so, we combined a high-precision voltage reference and a voltage divider with precision-type resistors. The circuit is able to provide the calibration signal of 1.0mV with the required accuracy.

On the ADS1298, TESTN_PACE_OUT2 is connected to GND, while TESTP_PACE_OUT1 is muxed between the calibration signal and GND to create a step signal. The register of each channel is all set to TEST_SIGNAL while the test signal source of the CONFIG2 register is set to external.

What we notice is that the ADS1298 seems not capable to distinguish the calibration signal level (1.0mV) from GND level (0V). However if we try to apply a calibration signal of 3mV (change the 100Ω resistor with a 300Ω resistor), we see a difference.

Are we missing something into the ADS1298 configuration? Could it be that the ADS1298 is not capable to acquire a DC signal at such a low voltage level? Is there any example application of the calibration of the ADS1298 using an external reference signal? 

Thanks.

Regards,

Fullscreen 4532.ads1298_lib.c Download 

void set_all_ads1298_reg (TADS1298REGS * all_reg)
{
    /*---------------------------------------*/
    /*config1 register*/
    /*---------------------------------------*/   
    all_reg->config1.control_bit.reserved=0;
    all_reg->config1.control_bit.hr=HIGH_RESOLUTION; 
    all_reg->config1.control_bit.daisyen=0; 
    all_reg->config1.control_bit.clken=0; 
        
    all_reg->config1.control_bit.rsv=0;
    
    all_reg->config1.control_bit.dr=HR_500SPS; //4KSPS
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*config 2*/
    /*---------------------------------------*/
    all_reg->config2.control_bit.rsv7=0;
    all_reg->config2.control_bit.wct_chop=0; 
    all_reg->config2.control_bit.inttest=0; 
    all_reg->config2.control_bit.rsv3=0;
    all_reg->config2.control_bit.testamp=0; 
    all_reg->config2.control_bit.testfreq=0b00;  
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*config 3*/
    /*---------------------------------------*/    
    all_reg->config3.control_bit.pdbrefbuf=1; 
    all_reg->config3.control_bit.rsv6=1; 
    all_reg->config3.control_bit.vref4v=0; 
    all_reg->config3.control_bit.rldmeas=0; 
    all_reg->config3.control_bit.rldrefint=1; 
    all_reg->config3.control_bit.pdbrld=1; 
    all_reg->config3.control_bit.rldloffsens=0; 
    all_reg->config3.control_bit.rldstat=0;  
    /*---------------------------------------*/ 
    
    /*---------------------------------------*/
    /*LOFF*/
    /*---------------------------------------*/       
    all_reg->loff.control_bit.compth=0b000; 
    all_reg->loff.control_bit.vleadoffen=0; 
    all_reg->loff.control_bit.ileadoff=0b00; 
    all_reg->loff.control_bit.fleadoff=0b01; 
    /*---------------------------------------*/ 
    
    /*---------------------------------------*/
    /*ch1set*/
    /*---------------------------------------*/
    all_reg->ch1set.control_bit.pd=0; 
    all_reg->ch1set.control_bit.gain=GAIN_1; 
    all_reg->ch1set.control_bit.rsv=0; 
    all_reg->ch1set.control_bit.mux=INPUT_TEST_SIG; 
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*ch2set*/
    /*---------------------------------------*/
    all_reg->ch2set.control_bit.pd=0; 
    all_reg->ch2set.control_bit.gain=GAIN_1; 
    all_reg->ch2set.control_bit.rsv=0; 
    all_reg->ch2set.control_bit.mux=INPUT_TEST_SIG;
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*ch3set*/
    /*---------------------------------------*/
    all_reg->ch3set.control_bit.pd=0; 
    all_reg->ch3set.control_bit.gain=GAIN_1; 
    all_reg->ch3set.control_bit.rsv=0; 
    all_reg->ch3set.control_bit.mux=INPUT_TEST_SIG;
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*ch4set*/
    /*---------------------------------------*/
    all_reg->ch4set.control_bit.pd=0;
    all_reg->ch4set.control_bit.gain=GAIN_1; 
    all_reg->ch4set.control_bit.rsv=0; 
    all_reg->ch4set.control_bit.mux=INPUT_TEST_SIG; 
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*ch5set*/
    /*---------------------------------------*/
    all_reg->ch5set.control_bit.pd=0; 
    all_reg->ch5set.control_bit.gain=GAIN_1; 
    all_reg->ch5set.control_bit.rsv=0; 
    all_reg->ch5set.control_bit.mux=INPUT_TEST_SIG; 
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*ch6set*/
    /*---------------------------------------*/
    all_reg->ch6set.control_bit.pd=0; 
    all_reg->ch6set.control_bit.gain=GAIN_1; 
    all_reg->ch6set.control_bit.rsv=0; 
    all_reg->ch6set.control_bit.mux=INPUT_TEST_SIG; 
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*ch7set*/
    /*---------------------------------------*/
    all_reg->ch7set.control_bit.pd=0; 
    all_reg->ch7set.control_bit.gain=GAIN_1; 
    all_reg->ch7set.control_bit.rsv=0; 
    all_reg->ch7set.control_bit.mux=INPUT_TEST_SIG; 
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*ch8set*/
    /*---------------------------------------*/
    all_reg->ch8set.control_bit.pd=0; 
    all_reg->ch8set.control_bit.gain=GAIN_1; 
    all_reg->ch8set.control_bit.rsv=0; 
    all_reg->ch8set.control_bit.mux=INPUT_TEST_SIG; 
    /*---------------------------------------*/    
    
    /*---------------------------------------*/
    /*rld_sensp*/
    /*---------------------------------------*/    
    all_reg->rldsensp.value=0;
    /*---------------------------------------*/ 
    
    /*---------------------------------------*/
    /*rld_sensn*/
    /*---------------------------------------*/    
    all_reg->rldsensn.value=0;
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*loff_sensp*/
    /*---------------------------------------*/
    all_reg->loffsensp.value=0x00;
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*loff_sensn*/
    /*---------------------------------------*/
    all_reg->loffsensn.value=0x00;
    /*---------------------------------------*/    
    
    /*---------------------------------------*/
    /*loff_flip*/
    /*---------------------------------------*/
    all_reg->loffflip.value=0x00;
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*GPIO*/
    /*---------------------------------------*/
    all_reg->gpio.value=0x0F; //input
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*PACE*/
    /*---------------------------------------*/
    all_reg->pace.control_bit.rsv=0b000;
    all_reg->pace.control_bit.pacee=0b00; 
    all_reg->pace.control_bit.paceo=0b00; 
    all_reg->pace.control_bit.pdpace=0; 
    /*---------------------------------------*/
    /*---------------------------------------*/
    /*RESP*/
    /*---------------------------------------*/
    all_reg->resp.value=0x20; 
    /*---------------------------------------*/

    /*---------------------------------------*/
    /*CONFIG4*/
    /*---------------------------------------*/
    all_reg->config4.control_bit.freq=0b000;
    all_reg->config4.control_bit.rsv4=0; 
    all_reg->config4.control_bit.singleshot=0; 
    all_reg->config4.control_bit.wcttorld=0; 
    all_reg->config4.control_bit.pdbloffcomp=0;    
    /*---------------------------------------*/    
    
    /*---------------------------------------*/
    /*WCT1*/
    /*---------------------------------------*/    
    all_reg->wct1.control_bit.avfch6=0;
    all_reg->wct1.control_bit.avlch5=0;
    all_reg->wct1.control_bit.avrch7=0;
    all_reg->wct1.control_bit.avrch4=0;
    all_reg->wct1.control_bit.pdwcta=1; 
    all_reg->wct1.control_bit.wcta=0b010; 
    /*---------------------------------------*/
    
    /*---------------------------------------*/
    /*WCT2*/
    /*---------------------------------------*/
    all_reg->wct2.control_bit.pdwctc=1; 
    all_reg->wct2.control_bit.pdwctb=1; 
    all_reg->wct2.control_bit.wctb=0b100; 
    all_reg->wct2.control_bit.wctc=0b011;   
    /*---------------------------------------*/
    
    return;
}

  • 0
    TI__Mastermind 38745 points
    Hello Rudy,

    The problem is not related to the ADCs resolution. The device is capable of distinguishing 1 mV. Instead, the problem is related to the common-mode of the input signal as it relates to the output range of the ADS1298's PGA. The PGA's output is limited to 200 mV within the rails. The PGA will not be linear if it's output is 1 mV from the rail.

    Instead, you will need to put the common-mode of the input signal within the range specified by equation 2 in the datasheet.

    Regards,
    Brian
  • 0 in reply to Brian Pisani
    Prodigy 110 points

    Thanks for your reply Brian. By the equation 2 we have the following:

    3.0995 > CM > 3.5005

    when

    AVDD = 3.3V
    Gain = 1
    Vmax_diff = 0.001V

    meaning that we will need to apply add an input common mode voltage in the calculated range. For instance, apply 3.1V on TESTN and 3.101V on TESTP, so that the differential output of the PGA will be 1mV. Is this correct?

    Thank you.

    Best,

  • 0 in reply to Rudy Rigoni
    TI__Mastermind 38745 points
    Rudy,

    If AVDD = 3.3, I'd recommend making the common-mode closer to mid-supply. So using your example. You could apply 1.501 on TESTP and 1.500 on TESTN giving a 1 mV differential voltage with the common-mode voltage being well within the range of the PGA.

    Regards,
    Brian Pisani
  • 0 in reply to Brian Pisani
    Prodigy 110 points

    Hi Brian,

    we kept TESTN set to 1.64V and tried incremental steps of 0.001V on TESTP (1.641V, 1.642, etc.), even though the EN normative only requires 1mV. The common-mode voltage of 1.64V did come from the same source. As you can see from the image here below, we noticed a particular behaviour when increasing the step (square wave) signal amplitude:

    1. The lower level is shifting depending on the signal amplitude (notice the difference between 1mV and 2mV)

    2. The increase of amplitude is not proportional/linear (again, notice the huge difference between 1mV and 2mV)

    Because of this behaviour, it seems the calibration process cannot be consistent. By following the EN normative, a step signal of 1mV should allow us to calibrate the system. Thus, we were able to define a calibration parameter ratio, which in this case was 7.7279 (see table below).
    Since we know the amplitude if the other step signals, we tried to confirm the calculated calibration parameter ratio. However, when using that parameter on other amplitudes the relationship is not valid. For instance:

    0.6786 [mV] * 7.7279 = 4.45 mV  (should be 2mV though)

    Would you say this is a normal behaviour for the ADS1298 or we are making something wrong?

    Thank you very much for any help you can give us.

    Best,

    Rudy

  • 0 in reply to Rudy Rigoni
    TI__Mastermind 38745 points
    Hello Rudy,

    I understand you are attempting to calibrate for gain error in your circuit. We actually test for gain error and put the expected value in the datasheet so you can have a ballpark sense for what you should receive. On page 13 we specify a maximum gain error of 0.5%. This means that the ratio of input voltage to output voltage should never be greater than 1.005 or less than 0.995 (after dividing out PGA gain).

    That number does not include offset error. Offset error is the mean voltage at is output from the device when the inputs are shorted together i.e. 0 V input. We specify a typical 500 uV offset on page 13, but really it will change with gain (see Figure 15 in the datasheet).

    However, even then I don't understand the results of your test. Are you really seeing a 0.1294 mV output voltage when you input 1 mV? I expect you to see very close to 1 mV if you input 1 mV. Have you checked your signal input using an oscilloscope? Perhaps there is something wrong with the setup. If you are using a bench supply to generate the common-mode signal, verify that the grounds of the supply and the board are tied together. Then, you can also tie the ground of your signal generator to the output of the bench supply (in your case, the 1.64 V output) and the square wave will vary around that voltage.

    Brian
  • 0 in reply to Brian Pisani
    Prodigy 110 points

    Hi Brian,

    what we want to do is a calibration of the whole system. Actually, we are assuming the error could be given by different errors and not only by the gain. Anyway, in order to be completely sure about our setup, we made an additional test using the ADS1298 dev board. All the GND lines has been tied together carefully.

    When we apply a 1mV square (common mode input voltage of 1.64V) on TESTP, what we see is a square wave of 0.3mV (see image below). If we apply a 2mV square wave, what we see is a square wave of 1.3mV (see image below). If apply a 3mV square wave, we got a square wave of 2.4mV. 

    Anyway, because the EN normative specifically requires a 1mV (step) signal to calibrate the system, we can define the following parameter to calibrate the system:

    1 [mV] / 0.3 [mV] = 3.33

    In order to test the system and the calibration, we then tried to apply a 1mV square wave signal (still with a common mode input voltage of 1.64V) as an input to L2 lead (channel 3).

    What we see is a signal of around 0.29mV (see image below). So, 0.29 [mV] * 3.33 = 0,96mV, which is reasonable. When doing the same with a 2mV signal at the input channel, what we acquire is a signal of around 1.35mV (see image below). So, if we use the same calibration parameter: 1.35 [mV] * 3.33 = 4,49mV, which is of course wrong. By increasing the amplitude values (e.g. 3mV), the error increases.

    We might be wrong, but the system cannot be calibrated in this way because it is not stable. What is your opinion? Do you have any suggestion? Is there any existing application that uses a similar external calibration? 

    Thank you very much.

    Regards,

    Rudy

    , we get a value of 0.27mV as output of the ADS. This means the 

  • 0 in reply to Rudy Rigoni
    TI__Mastermind 38745 points
    Hey Rudy,

    I was not clear in my last message - I meant to say that there must be something wrong with the test setup, because it is not possible that the output of the ADC is that different from the input signal (i.e. 0.3 mV for a 1 mV input). Please probe the TESTP and TESTN pins with an oscilloscope to make sure the signal you are inputting matches what you think it should. Then, verify that the common-mode is, in fact 1.64V with respect to AVSS by probing the TESTP and TESTN signals seperately with respect to AVSS.

    Brian