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DAC5687EVM: DAC5687 EVM clocking, parallel data

Part Number: DAC5687EVM


Hi,

1) I want to send 16 bit digital data  from an FPGA board to DAC5687EVM. The digital values are changing with every rising edge of a100 MHz clock. I want to use the FPGA board as the clock source of the EVM, too. I know it has a poor jitter performance but is it possible to use it? 

2) Do I need any software or initial configuration while sending parallel data? (clock and data from FPGA to DAC5687EVM is enough? )

3) I want to monitor the analog voltage output on an oscilloscope but the EVM gives current output 0-20mA. Can I monitor 0-5V analog voltage by just mounting a 250 ohm resistor parallel to the power and ground pins of the SMA?

Thanks a lot for your interest

  • Hi Yunus,

    1. Yes you should be able to provide 16 bit data to through connector J13 and J14 for DAC A and DAC B. And should also be able to provide the clock from FPGA to the DAC board.

    2. You can used the DAC GUI to program the DAC5687EVM to your required configuration.

    3. Unbuffered Differential Output
    To provide unbuffered differential outputs, the EVM must be configured as follows: remove R6-R9, R21,
    R22, T1, and T2; install R5 (24.9), R10 (24.9), R19 (24.9), R20 (24.9), R24, R27-R30, and R32. With a 20
    mA full-scale output current, this configuration will provide a 0.5 Vpp output.

    Regards,
    Neeraj Gill