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ADS6125: How to match high speed ADC and lower speed DAC

Jingtai
Genius 4575 points
Part Number: ADS6125


In order to fit input signal frequency I have to select the higher speed ADC, on the other hand have to select the precision DAC to satisfy the accuracy. How do the ADC handle the input signal when the DAC has not finished converting? The MCU processea the convered data. Does the ADC repeat converting and wait for the DAC? Are there any better suoltions? 

  • 0
    TI__Mastermind 29220 points

    Hi,

    I have no idea what type of design you are trying to put together with these device so I cannot suggest a solution.  But the ADC that you are looking at will simply sample the analog input signal that you give it at every rising edge of the sample clock, and likewise it will output a sample on the output bus for every cycle of the sample clock.  The ADC doesn't wait for anything.  Whatever device you are hooking up the output of the ADC has to be able to keep up with the data and clock from the ADC or you will lose data.   I don't often see the sample data from one of our high speed ADCs going straight into an MCU as the MCU is likely not fast enough to latch in the data - usually I see an FPGA used to take the ADC data and process it.

    Regards,

    Richard P.

  • 0 in reply to Richard Prentice
    Genius 4575 points
    The input signal frequency is 10MHz and the ADC samples at least 20MHz. Even it is processed in FPGA the DAC can't convert it. The sample rate at the ADC is not able to slow down due to the arbitrary input. Do you know any other solutions?