DAC38RF82EVM: Using DAC38RF82EVM in 12-bit clock mode (CMODE5)

Saad,

We are looking into this.

Regards,

Jim

Saad,

Do the following:

1. Provide 375MHz to J1.

2. Provide 281.25MHz to J4.

3. Program the DAC

4. Go to the DAC38RF8x clocking tab and set the External Clock select to SE Path.

5. Go the LMK clock output tab and change the CLK0 & 1 divider to "1" and set the  DCLK source to Divider + DCC + HS

6. On the Quick start tab, click on PLL Auto tune.

7. Load the TSW14J56 firmware and provide the test file.

Regards,

Jim

Jim,

Thanks for the reply. I will try this and will update you. Just a question before I proceed,

What clock frequencies may I use if I want to use the DAC at the maximum allowed sampling rate of 3.33 GSPS (DAC38RF82 Datasheet, section 3, para 2)?

Best Regards,

Saad

Saad,

Is this using the same mode you mentioned earlier and with the internal PLL?

Regards,

Jim

Jim,
Could you please comment on what would set the datarate parameter (SPS) in the HSDC Pro? What value of M and N may I set with the onchip PLL option?

Best Regards,
Saad