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DAC38J84: about "SYNC_out from JESD"

toshi-e2e
Genius 4860 points

Part Number: DAC38J84

Hi all,
Could you please tell me how to generate the  trigger of "SYNC_out from JESD"?

Regards,
Toshi

  • 0
    TI__Guru* 91947 points

    Toshi,

    Are you trying to manual set the output SYNC signal from the DAC? If so, the LVDS SYNC or CMOS SYNC output?

    Regards,

    Jim

  • 0 in reply to jim s
    Genius 4860 points

    Hi, Jim-san,
    thanks for your support.

    I do not understand the meaning of "SYNC_out from JESD" clearly. 
    I would like to confirm, is "SYNC_out  from JESD" the same meaning as the SYNC signal output from DAC (as the link synchronization request signal)?

    If yes, 
    in order to output SYNC from DAC, it is possible to set "1" to jesd_reset_n.
    Is there any other way?

    when I want to clear the NCO accumulator by "SYNC_out from JESD",
    which is the trigger timing to reset the NCO accumulator when asserting the SYNC signal or deasserting it?

    Best regards,
    Toshi

  • 0 in reply to toshi-e2e
    TI__Guru* 91947 points

    Toshi,

    "SYNC_out from JESD", refers to the SYNC output signal from the JESD block. This is the output signal from the DAC but can also be used inside the DAC to reset several of the registers.  

    If you set "jesd_reset_n" to a "0", this will force the SYNC output to go low. This is the default setting of this register after power up. After the user programs the DAC, they must set the init_state" to "1111" and the jesd_reset_n" = "1" to start the link initialization. This will allow the DAC to assert SYNC high after CGS has been established. See section 8.3 of the data sheet. 

    Are you having issues with getting your link established on your system?

    Regards,

    Jim 

  • 0 in reply to jim s
    Genius 4860 points

    Jim-san,
    thanks a lot for your support.
    I understood and there is no problem with that.

    Best regards,
    Toshi