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LMK04828: How can the DCLKOUT12 Output Frequency be Changed?

Victor Salomon
Expert 3910 points

Part Number: LMK04828

Hello team,

I am supporting an application using the LMK04828, could you share how to change the LMK04828 DCLKOUT12 output frequency? is there any documentation that describes this?

Currently DCLKOUT12 is setup for 122.88 MHz and DCLKOUT (0, 8, 9, 10, 11) outputs setup for 153.6 MHz, the intention would be to keep all other DCLKOUT outputs DCLKOUT (0, 8, 9, 10, 11) frequencies should still remain 153.6 MHz.

For reference, the DCLKOUT12 clock goes into the input clock of an DAC3484.

  • 0
    Prodigy 100 points
    There are some additional information: The CLKin0 is 153.6 MHz; The OSCin clock is 122.88 MHz; CLKin_SEL[1:0]=00; CLKin_SEL_MODE=001
  • 0 in reply to Mike Karlinsky89
    TI__Mastermind 28560 points

    Hello,

    You are asking with respect to changing the frequency on the DAC3484 EVM software? I'm not quite sure how their interface works, but you can change the divider for the DCLKout12 which resides in register 0x130[4:0]. Assuming VCO0 is being used on the LMK04828 and locked to 2457.6 MHz, the divider would be programmed to 20 for 122.88 MHz. To get 153.6 MHz from 2457.6 you will need to change divider to 16. If you need to change the VCO frequency also, you will need to re-program PLL R and PLL N dividers.

    You may consider referring to the LMK04828 datasheet (SNAS605), or try downloading the TICS Pro software (TICSPRO-SW) which has a profile for LMK04828 and allows you to generate programming configurations.

    You may also consider posting to the DAC group as they may be able to assist better with their software, perhaps there is some built-in interface to make this change?

    73,
    Timothy

  • 0 in reply to Timothy T
    Prodigy 100 points

    Hi Timothy,

    Thanks for the reply and explanation!

    The current LMK04828 settings:

    DCLKout2 register 0x108 = 0x01; The divider value is 1; The DCLKout2 frequency is 2,457.6 MHz.

    DCLKout12 register 0x130 = 0x05; The divider value is 5; The DCLKout12 frequency is 491.52 MHz.

    This DCLKout12 clock is the DAC3484 DACCLK input.

    In DAC3484 DATACLK input is 122.88 MHz.

    I need to change the DAC3484 DATACLK  from 122.88 MHz to 153.6 MHz.

    Does it mean if I change the DAC DATACLK to 153.6 MHz from 122.88 MHz I will also have to change DAC3484 DACCLK to 614.4 MHz from 491.52 MHz by changing the divider in LMK register 0x130 to 0x04 from 0x05? 

    I am not sure how to re-post the same question to the DAC group.

    Could you please help me with this as well?

    Thanks,

    Mike

  • 0 in reply to Mike Karlinsky89
    TI__Guru* 91947 points

    Mike,

    That is correct. You will need to change the DACCLK to 614.4MHz.

    Regards,

    Jim

  • 0 in reply to jim s
    Prodigy 100 points

    Hi Jim,

    Thanks for the answer!

    Do I have to change any DAC3484 control registers settings if I change inputs clocks values?

    Thanks,

    -Mike

  • 0 in reply to Mike Karlinsky89
    TI__Guru* 91947 points

    Mike,

    If you are using the NCO, you will have to change this frequency register and then do a SIF SYNC after all changes have been made.

    Regards,

    Jim

  • 0 in reply to Timothy T
    Prodigy 100 points

    Hi Timothy,

    Before I had the DAC3484 input DAC_CLK rate is 491.52 MHz and input DAC_DATACLK rate is 122.88 MHz and I was able to see the DAC3484 output tone on the spectrum analyzer.

    After I changed the DAC3484 input DAC_CLK rate to 614.4 MHz and input DAC_DATACLK rate to 153.6 MHz I stopped being able to see the DAC3484 output tone on the spectrum analyzer.

    What the DAC3484 registers settings do I have to change to be able to see the DAC3484 output tone on the spectrum analyzer?

    Thanks,

    Mike

  • 0 in reply to Mike Karlinsky89
    Prodigy 100 points

    Hi Timothy,

    There is more information regarding this case.

    Initially when I used DAC_DATACLK rate is 122.88 MHz and DAC_CLK is 491.52 MHz the interpolation was set to 8x.

    What interpolation value do I need to set for DAC_DATACLK rate is 153.6 MHz and DAC_CLK is 614.4 MHz?

    Thanks,

    Mike

  • 0 in reply to Mike Karlinsky89
    Prodigy 100 points

    Hi Timothy, 

    There are some discrepancy regarding the DAC3484 configuration.

    As I mentioned before in the old configuration the DAC input data rate was 245.76 MSPS, the DATA_CLK was 122.88 MHz, and the DAC_CLK was 491.52 MHz.

    The Interpolation is set to 8x.

    The register Config0 bits 11:8 set to 0100.

    With this configuration I can see the DAC output tone with spectrum analyzer.

    At the same time in the TI DAC3484 User Guide in Table 63 on page 85 I can read if the input sampling rate is 245.76 MSPS the interpolation 8X is NOT POSSIBLE.

    Is that table not accurate?

    Next if I change the DAC input data rate to 307.6 MSPS, the DATA_CLK to 153.6 MHz, and the DAC_CLK to 614.4 MHz what Interpolation do I have to set in the register Config0?

    Again in the Table 65 on page 88 the interpolation 8x is NOT POSSIBLE.

    For that new settings I tried interpolation 2X, 4X, 8X, 16X but still not be able to see any DAC output tone.

    Thanks,

     -Mike

  • 0 in reply to Mike Karlinsky89
    TI__Mastermind 28560 points

    Hello Mike,

    Please repost in the high speed data converters form.

    73,
    Timothy