ADS5474: About DC input specification

Hi,

as long as the analog input signal in the DC coupled case has the correct common mode voltage, then the analog inputs specifications will still apply.   You would be responsible for setting the correct common mode level of the input signal though, since in the AC coupled case the ADC will set the biasing of the input signal to the correct VCM.  In the DC coupled case, you signal driver would need to be differential and of the correct biasing.   If you are looking at the EVM, the default EVM configuration is with a single ended analog input through a transformer or balun to convert to differential, and the magnetics used will have a lower limit to their bandwidth.  You would not be able to pass DC through the magnetics - they would have to be removed or jumpered around to bring in a differential signal.

For the 1Khz 50% duty cycle square wave - this is still for the analog input, correct?  Not the clock?  The analog input doesn't care what the waveform is as long as it is truly balanced differential and at the right common mode.

Regards,

Richard P.

Richard-san

Thank you for reply.

Customer condition is Analog input (DC coupling).

Additional information, customer requesting performance data is near below image.

(Especially, important point is low frequency range.  best pattern is "X-axis: 0Hz~".)

If there near spec graph, please give me.

Best regards,

Satoshi

Hi,

We do not have characterization data near DC.  What is in the datasheet is what we have.  The data converter requires a fully balanced symmetrical differential input signal, but our laboratory test equipment used for high speed ADCs are single ended.  So there has to be a single ended to differential conversion, and the baluns or transformers commonly used have a lower bandwidth limit.  For a DC coupled input down near DC would require a different method of single ended to differential, such as an amplifier circuit, and then the data would represent the amplifier + data converter performance rather than the performance of the data converter. 

Regards,

Richard P.

Richard-san

Thank you for information, I understood no characterization data.

Sorry for addition, is there way to simulate the above data?
For example, TINA-TI, ORCAD, PSPICE, etc.
If there have these model, can you give me this data?

By the way, I trying to simulate TIGAR tool, but it is not work well.

Best regards,
Satoshi

Hi,

the best information that we would have for simulation is the Figure 34 of the datasheet, the analog input equivalent circuit.  This is a fairly accurate representation of the analog input, with values representing the bondwire inductance, the parasitic capacitance of the package and bondpad, and the resistive biasing of the signal to the desired VCM before the input buffers which could be considered to be a relatively high-impedance element.   We have on some other devices taken the values of this equivalent input circuit and encapsulated them into a TINA model, but I am not aware of that having been done for this device and the TINA models for other devices do not have any more information than is known of in the equivalent input circuit shown.    As you can see in figure 34, there is little in the circuit that would have a strong effect on DC or very low input frequencies.   The bondwire inductance would look like a short at DC and the parasitic capacitances would look like an open at DC.   The thing to consider would be the internal biasing resistors to VCM if a DC coupled input circuit were to try to drive the signal to a VCM much different than that of the ADC's VCM.  In that case the ADC's internal biasing would exert a weak 'pull' on the VCM of the incoming analog signal towards the desired VCM for the device.

The IBIS model that is on the web would not cover the analog input as IBIS is generally meant for the digital signals.  So apart from IBIS for the digital signals then figure 34 is what we have for the analog input.

Regards,

Richard P.

Richard-san

Thank you for reply.
I will make Figure 34 by TINA-TI discrete parts.
About buffer of Figure 34 circuit, which buffer IC SPICE macro is the best?

Best regards,
Satoshi

Hi,

since we would just be modeling the signal with the effects of the input parasitics, and not the signal further into the device after the buffer, we would generally not have a buffer placed there in the TINA model.    The buffer is considered to be relatively high impedance, and any input parasitics that the buffer would have are already considered in the rest of the model, leaving the buffer itself to be considered an 'ideal' buffer at that point.

Regards,

Richard P.

Richard-san

Thank you for advice,
I did't find ideal buffer model.
Can you attach ideal buffer model (or input circuit)?

Best regards,
Satoshi

Hi,

I do not have a model at hand for an ideal input buffer.  When we made TINA models for other devices from the equivalent input circuit representation we did not include such a buffer.  My point was that the values for the parasitic capacitances shown in the equivalent model already included the parasitics due to the actual input buffer so that the model shown should be a good representation of what the device looks like to the system being simulated. 

Regards,

Richard P.

Richard-san

Sorry for addition,

①I attached TINA-TI design for Figure-34, is there point of improvement?

ADS5474.TSC

②About IBIS model, is there user's manual for first startup?

　Customer will use IBIS model at first time, and I can't use IBIS model because of environment.

Best regards,

Satoshi

Richard-san

Thank you for reply,
Sorry, next is maybe last question.

About Gain-Frequency spec of TINA-TI simulation(Analog side), is this not depend on IBIS simulation(Digital side)?
For example; When digital side(later stage of TINA's VF1 and VF2) change the making, analog side simulation is not change, etc.

Best regards,
Satoshi

Hi,

The digital outputs of the device should be very well decoupled from the analog inputs, so that the analog inputs are not affected by what the digital outputs are doing when they are switching. 

or, if you are asking if we have a behavioral model of the device to model or simulate what the output code will be based on what the analog input voltage is, then no we do not have such a behavioral model of the device.

Regards,

Richard P.