DAC38RF82: CLkout uses

Clint,

Most users would disable SYSREF after the JESD link has been established. If the link was to go down, enabling SYSREF would be required and this would reset the PLL, causing a disturbance in the CLKOUT signal.

Regards,

Jim  

Thanks Jim,
So the thought was to use clkout to clk the LMK04832 which provides sysref to the entire system. These signals from the LMK chip to the FPGA are only used for the JESD link. My thought is if the JESD link is already down, it won't matter at that point if sysref glitches due to the pll resetting. As long as its stable after that to re-establish and maintain the link. So next question is will there be any glitching/resetting of the PLL if/when sysref is disabled? or any concerns of a glitch in sysref affecting the PLL?

Thanks

Clint,

Since the PLL provides the clock to DAC when selected by the user, I feel this is a very stable source and you will not have to worry about glitches as long as SYSREF is disabled.

Regards,

Jim