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ADS1262: Data rate

Phil Nguyen
Prodigy 170 points
Part Number: ADS1262


Hi all,

I am testing a new design with ADS1262 and cannot make it to run at fast sampling rate.

Running scenario:

1. Do set-up for the ADC via SPI. Read the value at beginning, then reconfigure and write data back to the ADS1262. Read again to make sure registers are set correctly. Set-up details is listed below.

2. Enable a timer interrupt on MCU, aiming at 20kHz (the device specification says it can do more than 38kHz)

3. At timer interrupt, pull START pin up to trigger a conversion

4. #DRDY pin is connected to an Interrupt pin on MCU. When #DRDY triggers, the MCU interrupt immediately read the ADS1262, and pull the START pin to low. The sequence repeats with timer interrupt and #DRDY interrupt.

Problems:

The time for #DRDY to go low from START signal is measured at about 208us. This is too slow and not correct according to the datasheet. Please see the attach photo

Below are the settings that I tried:

config->internal_ref_en = 1; //enable internal reference
config->crc_en = 1;              //enable crc byte
config->status_en = 1;         //enable status byte
config->chop = 0;                //disable chop
config->delay_idx = (((uint8_T)0U));     //no delay - default
config->pulse_mode_en = (((uint8_T)1U));  //enable pulse mode conversion
config->filter_idx = (((uint8_T)0U));              //filter selection set to 0: sinc1 filter
config->pga_bypass = (((uint8_T)0U));        // enable PGA
config->pga_gain = (((uint8_T)5U));            // pga gain set to 0x5 (0101b): 32V/V gain
config->datarate_idx = (((uint8_T)15U));     // DR set t0 0xF : 38400 SPS
config->neg_input_mux = (((uint8_T)2U));   // Negative input: AIN2
config->pos_input_mux = (((uint8_T)0U));   // Positive input: AIN0
config->neg_ref_mux = (((uint8_T)3U));      //Negative Reference input: AIN5
config->pos_ref_mux = (((uint8_T)3U));      //Positive Reference input: AIN4

All other values are kept as default.

I'm not sure what I have done wrongly. Any help is much appreciated.

Many thanks,

Phil

  • 0
    TI__Mastermind 44720 points

    Hi Phil,

    This this a delta-sigma ADC with a low-latency digital filter. Even though it is low latency, there is still some delay between the start of a conversion and when /DRDY goes low. In the case of the 38.4 kSPS, the digital filter is a SINC5 filter, which takes roughly 5 conversion periods to get the first conversion result (think of a moving average filter that is averaging 5 results). This is known as the conversion latency, as is given for each data rate and filter type in table 17:

    You're measuring the 38.4 kSPS, SINC5 filter conversion delay precisely. Please note that is delay only applies to the fist conversion result, every consecutive conversion result will appear at regular intervals of the data rate period. For conversion latencies that only require about 1 conversion period to settle, you would need to use either the SINC1 or FIR filter at one of their supported data dates.

    To learn more about these filters and the latency associated with them, refer to the following application note:

    Best regards,
    Chris

  • 0 in reply to Christopher Hall
    Prodigy 170 points

    Hi Chris,

    Many thanks for your response.

    In your answer, you mentioned:

    Christopher Hall said:

     Please note that is delay only applies to the fist conversion result, every consecutive conversion result will appear at regular intervals of the data rate period. For conversion latencies that only require about 1 conversion period to settle, you would need to use either the SINC1 or FIR filter at one of their supported data dates.

    My question would be how to get the consecutive conversion result? I have the second stage filter set to SINC1 as your suggestion, but it seems that the conversion delay is consistent at 208us. Please see the photo below.

    Kind regards,

    Phil

  • 0 in reply to Phil Nguyen
    TI__Mastermind 44720 points
    Hi Phil,

    Instead of toggling the START pin with each conversion, you can hold the START pin high and you'll see /DRDY start to toggle at the data rate period.

    Each time you stop and start the conversion, the digital filter will be reset and /DRDY will be delayed by the conversion latency. Note that writing to certain device registers (such as the input mux) will also cause the conversion to restart and will require this delay as well.

    Best regards,
    Chris
  • 0 in reply to Christopher Hall
    Prodigy 170 points

    Many thanks, Chris.

    I figured it out just right before your answer, thank you for your confirmation.

    I need to add that the device must be configured to run in continuous mode (bit RUNMODE in register #03 set to 0).

    My conclusion would be to achieve high datarate, the device must run in continuous mode, otherwise the maximum conversion rate is limited by the first conversion delay. Is that correct?

    Kind regards,

    Phil

  • 0 in reply to Phil Nguyen
    TI__Mastermind 44720 points
    Hi Phil,

    That is correct! And yes, the device run mode needs to be set for continuous conversion mode.

    Let me know if you have any other questions I can help with!

    Best regards,
    Chris
  • 0 in reply to Christopher Hall
    Prodigy 170 points

    Hi Chris,

    Many thanks for your support.

    May I have another question? How can I get the conversion result corectly? At the moment I have the following single-ended configuration:

    VDD = VADD = 5V

    VSS = AVSS = 0V

    AIN-P = IN0 = Signal Input

    AIN-N = IN2 = 0V

    PGA gain is disabled. The configuration is following the "Dos and Don'ts" recommendations in the datasheet

    The input signal is changing from 0 to 5V, but the reading always gives me 0xFFFFFF7F

    Many thanks

    Phil

  • 0 in reply to Phil Nguyen
    TI__Mastermind 44720 points

    Hi Phil,

    As a sanity check, the ADS1262 data is clocked out MSB first so I would expect the data your reading is more likely to be 0x7FFFFFFF (+2,147,483,647 or positive full scale), is that the case or are you truly getting 0xFFFFFF7F (-129 or close to 0V)?

    What are you using for the reference voltage?
    If the reference is disabled or not properly configured, you might get a full-scale reading.

    I might also suggest reading back the INPMUX register to double check that you've selected the correct inputs (and also to make sure the SPI communication is working as expected). Additionally, you might try enabling the STATUS byte with the data to see if you are getting any error flags.

    Please note: the STATUS byte may still indicate that there are PGA error flags, but with the PGA disabled you are okay to measure voltages between 0 and 5V.

    Best regards,
    Chris

  • 0 in reply to Christopher Hall
    Prodigy 170 points
    All working now, many thanks, Chris.
    The problem was because of the reference line, I did enabled internal reference (for testing), but forgot to select the internal reference source correctly.
    Kind regards,
    Phil
  • 0 in reply to Phil Nguyen
    TI__Mastermind 44720 points

    Hi Phil,

    Your welcome, I'm glad you were able to resolve the issue!

    Best regards,
    Chris