Other Parts Discussed in Thread: ADC32RF80
DEARS.
We are developing ADC32RF80.
Spur occurs at 2580.48Mhz
The target frequency overlaps the Spur frequency.
2949.12Mhz*(7/8)=2580.48Mhz
Spur occurs at a multiplication frequency of 368.64Mhz
How do you avoid spur?
We need a solution.
Our settings are as follows.
- Sampling Rate: 2949.12MHz
- Target Frequency : 2580.48MHz
- CLK Input: 2949.12MHz
- Decimation: /16
- LMFS: 4841
- Lane Rate: 7372.8Gbps
- K: 6
- SYSREF CLK: 5.12MHz
Thank you