Hi Team,
I have a customer who is considering designing a pressure sensor front end with the PGA300. The bridge that they are using is going to have a relatively high output offset voltage of 12.5mV. The problem is that their full scale voltage output of their resistive bridge is 32mV to 54mV (depending on the sensitivity of the bridge). In the case where the full scale output is 32mV, they are planning to use a gain of 80 for the PGA (VRef = 2.5V), so that they can use the entire dynamic range of the internal ADC.
Now, in the worst case where V_offset is 12.5mV and Full scale output is 32mV, Total output voltage is 44.5mV.
A gain of 80 on the PGA would give an input voltage to the ADC of 44.5mV * 80 = 3.56V, which would drive it into saturation.
Now from what I understand in the datasheet of the PGA300, the bridge offset compensation is done in the digital domain, after the A/D conversion. The problem that we would face in this case is that the output of the ADC would be saturated. The only way to avoid doing this is to reduce the gain of the PGA so that the ADC input in the worst case is less than VRef. However, this has the obvious drawback of not using the entire dynamic range of the ADC.
Do you have any suggestions about how this situation can be avoided? Perhaps a DAC or a voltage divider that drives a voltage into the inputs to cancel out the offset before the ADC?
Best Regards,
Mihir Gupta
FAE - South Germany