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DAC3482: DAC3482 Sync question

Part Number: DAC3482

DAC3482 Sync

One MM CTM are using the DAC3482

We want to get the fixed delay(latency) value from DAC3482 input to output from power-on to power-on.

We reference the 3482 datasheet and the slaa584 that DAC348x Device Configuration and Synchroniztion, DAC3482 Device Logics Synchronizatioan Sources as follows the table 1.

Circuits

FIFOin

FIFOout

Data Formatter

Clock Divider

NCO Accumulator

NCO Double Buffered

Sync source

SYNC

OSTR

SYNC

OSTR

SYNC

SYNC

The QMC is not used.

DATACLK =100MHz, DACCLK = 800MHz,interp = 8x,

SYNC and FRAME are from DATACLK by dividing 16 are 6.25MHz,and they are periodic signal.

The Refence Clk is 100MHz, N=1;M=8,P=5,VCO = 4000MHz

OSTR = PFD = 100MHz.

We start sequence is recommended to power-up the DAC3482 according to the datasheet in page-73.

We found the delay is variational from power-on to power-on.

Can you tell me the question about our configuration.