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ADS1293EVM: ADS1293EV IEC compliance test, input impedance

YuanTe Liu
Prodigy 70 points
Part Number: ADS1293EVM
Other Parts Discussed in Thread: ADS1293,

Have anyone performed IEC 60601-2-47 test item 201.12.4.4.102?
It is used to check device input impedance.

It first check 5mV 10Hz sinusoidal signal, then adding a 620K ohm resistor between input and ADS 1293EVM board.
By checking the Vpp of output signal, input impedance can be calculated from the variance of Vpp of sinusoidal signal.

When I do this test, it is found no output signal (or weak , 10-30uV). Is it right behavior? 

Regards,

Yuan Te Liu

  • 0
    TI__Guru 66346 points

    Hello Yuan,

    Thanks for your question.

    I'm not intimately familiar with the IEC 60601-2-47 standard. Can you please elaborate further on your test setup?

    1. Is the 5mV sine wave single-ended or differential?
    2. Do you have 620k in series with each input pin (i.e. INP and INN) or just one input?
    3. 10uV - 30uV is the differential output voltage?

    I believe the test should involve a differential input signal between two input pins, each with a series resistance (Rs). The differential output voltage (Vd) will be calculated from the input source (Vs) and the differential impedance (Rd):

    Vd = (Vs*Rd) / (2*Rs + Rd)

    Solving for Rd gives you:

    Rd = Vd*(2Rd) / (Vs - Vd)

    Best Regards,

  • 0 in reply to Ryan Andrews
    Prodigy 70 points

    Andrew,

    It is the test item "201.12.4.4.102 *Input impedance" of IEC 60601-2-47

    Attached you may find the test diagram (well known as figure 201.101) as the testing screen of our ECG simulator.
    From it, we may know its testing procedure and passing criterion.

    When 0.68Mohm R and 4.7nF C added, no signal were found (it is OK without them)  

    Ted Y. Liu

  • 0 in reply to YuanTe Liu
    TI__Guru 66346 points
    Hi Ted,

    Thank you for the explanation of this standard. It is much more clear to me what you need to measure.

    So VIN = 5mVpp, and to pass this standard, you must measure > 94% of 5mVpp (i.e. > 4.7mVpp) under all three test conditions (620k in series, 620k + 300mV offset, and 620k - 300mV offset). Is my understanding correct?

    The typical input resistance (RIN) for the ADS1293 is 500M. In simulation, I've found that the device should easily pass this standard with less than 1% loss in peak-to-peak amplitude.

    Can you please share your complete register settings so that I can review them? Also, please share the remaining details about the test criteria. I assume you are measuring the output of the channel connected to P1 and P2, correct?

    Best Regards,
  • 0 in reply to Ryan Andrews
    Prodigy 70 points

    Andrew, thanks for your flash response.

    Your understanding is right. From the datasheet, ADS1293 should pass this test easily as my previous expectation.

    The setting is the default settings of ADS1293 EVM. I have download and share you as attached file.
    The failure symptom also attached below. Basically, there is no signal even with larger DC (+/-300mV)

    ADS1293EVM and the simulator (by WhaleTeq) are completely isolated by different PC's using their battery power (no AC line)

    ADS1293EVM Register Map download

    address value
    0x00 0x00
    0x01 0x11
    0x02 0x19
    0x03 0x00
    0x04 0x00
    0x05 0x00
    0x06 0x00
    0x07 0x0f
    0x08 0xff
    0x09 0x00
    0x0a 0x07
    0x0b 0x00
    0x0c 0x04
    0x0d 0x00
    0x0e 0x00
    0x0f 0x00
    0x10 0x00
    0x11 0x00
    0x12 0x04
    0x13 0x00
    0x14 0x00
    0x15 0x00
    0x16 0x00
    0x17 0x05
    0x18 0x00
    0x19 0x00
    0x1a 0x00
    0x1b 0x00
    0x1c 0x00
    0x1d 0x00
    0x21 0x02
    0x22 0x02
    0x23 0x02
    0x24 0x02
    0x25 0x00
    0x26 0x00
    0x27 0x08
    0x28 0x00
    0x29 0x00
    0x2a 0x00
    0x2b 0x00
    0x2c 0x00
    0x2d 0x00
    0x2e 0x33
    0x2f 0x30
    0x30 0x00
    0x31 0x00
    0x32 0x00
    0x33 0x00
    0x34 0x00
    0x35 0x00
    0x36 0x00
    0x37 0x00
    0x38 0x00
    0x39 0x00
    0x3a 0x00
    0x3b 0x00
    0x3c 0x00
    0x3d 0x00
    0x3e 0x00
    0x3f 0x00
    0x40 0xff
    0x50 0x00
    0x60 0x00
    0x62 0x00

    Drive RA
    (1) without 620Kohm : CH-I (LA-RA)

    (2) with 620Kohm

    (3) with 620Kohm + 300mV DC

    (4) with 620Kohm -300mV DC

    Then I turned off LOD (You may see the selection button on the screen dump)
    (1) without 620Kohm

    (2) with 620Kohm

    (3) with 620Kohm + 300mV DC

    (4) with 620Kohm  -300mV DC

    Following is the register dump after turning LOD off

    address value
    0x00 0x00
    0x01 0x11
    0x02 0x19
    0x03 0x00
    0x04 0x00
    0x05 0x00
    0x06 0x08
    0x07 0x00
    0x08 0x00
    0x09 0x00
    0x0a 0x07
    0x0b 0x00
    0x0c 0x04
    0x0d 0x00
    0x0e 0x00
    0x0f 0x00
    0x10 0x00
    0x11 0x00
    0x12 0x04
    0x13 0x00
    0x14 0x00
    0x15 0x00
    0x16 0x00
    0x17 0x05
    0x18 0x00
    0x19 0x00
    0x1a 0x00
    0x1b 0x00
    0x1c 0x00
    0x1d 0x00
    0x21 0x02
    0x22 0x02
    0x23 0x02
    0x24 0x02
    0x25 0x00
    0x26 0x00
    0x27 0x08
    0x28 0x00
    0x29 0x00
    0x2a 0x00
    0x2b 0x00
    0x2c 0x00
    0x2d 0x00
    0x2e 0x33
    0x2f 0x30
    0x30 0x00
    0x31 0x00
    0x32 0x00
    0x33 0x00
    0x34 0x00
    0x35 0x00
    0x36 0x00
    0x37 0x00
    0x38 0x00
    0x39 0x00
    0x3a 0x00
    0x3b 0x00
    0x3c 0x00
    0x3d 0x00
    0x3e 0x00
    0x3f 0x00
    0x40 0xff
    0x50 0x00
    0x60 0x00
    0x62 0x00

    Thanks for your support. Have you a good weekend

    Ted Y. Liu

  • 0 in reply to YuanTe Liu
    TI__Guru 66346 points

    Hello Ted,

    I'm trying to replicate the test on the bench with the ADS1293EVM as well. One detail that I still want to clarify with you is the input voltage amplitude. Where does the standard specify the amplitude, at the source or P4? Keep in mind that the source voltage is divided down by 1/1000 before P4.

    My assumption is that the input source should be 1Vp, and P4 will be 1mVp. Then, you should see 1mV at the output as well, with or without the +/-300mV offset. I was able to verify this on the EVM using the standard 3-lead ECG settings.


    Best Regards,

  • 0 in reply to Ryan Andrews
    Prodigy 70 points

    Andrew,

    The source is 5mVpp sine wave. You can find the waveform as I attached before marked as "without 620K"

    The test is to ensure medical device with enough high impedance even with higher contact resistance.

    Ted

  • 0 in reply to YuanTe Liu
    Prodigy 70 points
    The source voltage I mentioned in my previous mail is P4 -P3 voltage. It is also the measured AC voltage at ADS1293EVM.
  • 0 in reply to YuanTe Liu
    TI__Guru 66346 points

    Hello Ted,

    Thanks again for clarifying. Please excuse my typo above, I did use 5Vpp at the Vin source, which resulted in P4 - P3 = 5mVpp. My conclusions are still the same.

    I was able to replicate your test on the bench using the ADS1293EVM. With LOD disabled, everything is working fine with 620k in series, the ADC output is almost exactly 5mVpp as well. I also tried to introduce +/-300mV offset, but my power supply is far too noisy for this measurement.

    However, with LOD enabled, I am seeing the same results as you. If I insert 620k in series with the input, my signal completely disappears. I need to speak with some colleagues to see whether the input impedance is changing when the lead-off current sources are enabled.

    One additional observation - in your results for LOD disabled, all 3 plots with 620k show a lot of noise (620k, 620k + 300mV, and 620k - 300mV). Do you keep your power supply in series for all 3 measurements and adjust the voltage to 0V, +300mV, and -300mV? If possible, I suggest removing the power supply completely for the first case with only 620k and see if the results improve.

    ***** Edited 02/09/18 *****

    I have found that the likely cause of the measurement failure with lead-off detection enabled is due to the large offset voltage introduced by the lead-off current. By default, the EVM uses the maximum 2.04 uA lead-off current. However, with 620k in series with one input, the differential offset voltage will exceed the +/- 400mV full-scale limit. This test requires adding additional +/-300 mV offset. Therefore, the remaining offset must be kept to less than 100 mV across the 620k series impedance. 100 mV / 620k = 161.3 nA.

     

     
    Best Regards,

  • 0 in reply to Ryan Andrews
    Prodigy 70 points

    Andrew, your statement is right when LOD is off. The test is passed but we need be handle line noise well.

    Thanks for your time to help me clarify this issue. We prefer to implement LOD as it is a good feature to our product.

    Regards

    Ted

  • 0 in reply to Ryan Andrews
    Prodigy 10 points

    Hi Andrew,

    I also encount this issue. Could you explain more how to meet the test requirment for input impedance?

    I am using ADS1293 EVM, feeding in RA a sine signal(5mV/10Hz).

    1. When add 620K in series, the waveform is flat.

    2. When I applied +-300mV offest, the waveform is distortion.

     Ivan