Other Parts Discussed in Thread: TMP100, TMP101
I am trying to find SEE data on ADS7263 and TMP100.
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Some additional information. These are being used on a military aerospace application and we need either actual SEE data or perhaps similar technology devices that do have SEE data. Or perhaps someone who has used these parts in an aerospace application that can indicate if any Single Event Effects or Single Event Latch Ups have occurred and number of hours they have been in operation.
Terry,
We do not have any specific SEU data on either of these devices. We DO have an SER (soft error rate) Estimator based on several decades of SEU/MBU data on a large number of TI technologies (SRAM bits cells and sequential logic), so if we know how many sequential cells and/SRAM bits a part has we cane estimate a worst-case failure rate from SER/SEU based on a customer-specific use environment. This tool and methods used to generate SER estimations if the basis for the JEDEC JESD89 and 89A test standards with which the tool is compliant.
To support this customer requests we are gathering information from the ADS7263 and TMP100 designs (e.g. the number of flip flips/latches and number SRAM bits in each product). Will this work for you?
Best regards,
Art
Terry,
I do not have the required information for the ADS7263. I do have the information for TMP101. Before I can proced I need some information. I can calculate the ground-based fail rate but to understand the your use case I will need altitude and latitude.
Best regadrds,
Terry,
Below is info related to the TMP101. We do not have details on ADS7263.
Under the JEDEC JESD89 sea-level standard and assuming that 130 latches/FFs are all critical (very over pessimistic) the soft error rate is ~ 0.66 FIT.
At an altitude of 50 kfeet 45 degree N latitude the higher neutron flux increases the fail rate to:
~ 637 FIT
The caveat here is that this presumes that a single soft fail in ANY of the 130 FFs will cause a chip upset. In MCUs/CPUs for example most of the logic is only sensitive 10% of the time.
The exception would be a reset latch or something like that, which, if hit, would always cause a system reset (obviously there would only be a few of these so the fail rate would be much lower).
To put it in perspective, with an average fail rate of 637 FIT if we assumed 100,000 flights at this altitude/latitude for 12 hour flights we could expect:
99,999 flights with no errors
1 flight with a single error in one of the 130 FFs