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DAC38J84: Test Jig

ikon
Genius 5355 points
Part Number: DAC38J84


Hi Support,

Am fabricating a test jig involving the DAC38J84 DAC.
Want to monitor the DAC outputs IOUTA, B, C and D.
What are my options of termination?
Can these outputs be connected directly to an SMA connector?

Thanks.

  • 0
    TI__Genius 12780 points

    Hi Ikon,

    As a first step, I would take a look at the outputs on the DAC38J84EVM .

    This schematic is available in the EVM design package located here  under "User guides".

    Regards,

    Dan 

  • 0 in reply to dBrock
    TI__Guru* 91947 points
    Ikon,

    Per page 56 of the data sheet:

    You need to have Assuming that the data is full scale (65535 in offset binary notation) and the RL is 25 Ω, the differential voltage
    between terminals IOUTP and IOUTN can be expressed as:
    VOUTP = 20mA x 25 Ω = 0.5 V
    VOUTN = 0mA x 25 Ω = 0 V
    VDIFF = VOUTP – VOUTN = 0.5V
    Note that care should be taken not to exceed the compliance voltages at node IOUTP and IOUTN, which would
    lead to increased signal distortion.

    Regards,

    Jim