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TLV2548: Trying to understand clocking in figure 8 mode 00

Jeff Coletti
Expert 8755 points
Part Number: TLV2548

Hi All

Customer wants to use the part as follows:

I want to use the ADC in a SPI mode.

The signal “CSTART” and “FS” will always be driven “hi’.

The configuration settings will be the following.

Internal reference using 4V.

The sample period select is   short sampling   12 SCLKS

The conversion clock source shall be set to internal OSC.

The conversion mode select  will be single shot.

The “EOC/INT” pin  shall be programmed for INT.

 

I would like to use a 16 Mhz clock for SCLK.

 

The data sheet indicates the maximum conversion time will be 3.86 us.

 

Are there any issues when using a 16 M hz SCLK with the configuration setting of short sampling ?

How many SCLKs are required for a conversion? Not sure I understand how to figure out the requirements when using internal clock.

Would they be better off using slk/4 in this application?

Thanks

Jeff

  • 0
    TI__Genius 16890 points
    Hi Jeff,

    You only need to worry about the sclk/DIV when you are using SCLK for the conversion. Since you are using the internal clock for conversion, your conversion time will be 3.86us.

    You start by setting CS to low. You send the input to be converted on the SDI line on the first four clocks. At the same time data for the previous conversion is being clocked out on the SDO line. After the channel selection is made the the voltage is sampled for 12 SCLKs (since you are using short sampling). Then the conversion starts of the sampled voltage. You are using the internal clock for conversion so this will take 3.86us. you will need to have 3.86us / (1/16M) = 62 clock cycles while this is going on. (You may be able to stop the clock for this period of time since the internal clock is being used for conversion, the datasheet is not clear on this, you can try both ways and see if both work.) Then you can pull CS high and start the process over for the next reading.

    Mike