Hi,
I am looking for a simulation model (either VHDL or Verilog) for this ADC.
I have only found IBIS Models but not the behavioral model to help me connecting this ADC to my FPGA.
Thank you for any help.
Best regards,
Guillaume
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Hi,
I am looking for a simulation model (either VHDL or Verilog) for this ADC.
I have only found IBIS Models but not the behavioral model to help me connecting this ADC to my FPGA.
Thank you for any help.
Best regards,
Guillaume