ADC121S101: input current calculation

Hello Kamal,

The numbers for DC Leakage Current in the datasheet (+/-1uA) are maximum limits for the device.  The actual input leakage current will be less than this number.

Mike

customer woul like to know the max current at the input Vin,

hi,
I am not talking about the INPUT POWER SUPPLY but the input of the ADC.
I mean this depends of the DC voltage at Vin pin, correct.
kamal

this will not depends of the switching frequency of the switch and the input resistor?

there are three things that doesn’t fit:

1. Your expert: “The maximum input current at the input pin is +/-1uA”

2. My measurements: The input current is approx.  -5uA when the input voltage is 0.5V, approx. 0uA when the input voltage is 2.5V and approx. 5uA when the input voltage is 4.5V. The ADC is supplied with 5V, and is running with 1Msps.

3. Your datasheet:

If you start with figure17: The sampling capacitor is charged to Va/2.

In figure16 the sampling capacitor with the initial voltage Va/2 is charged by the input voltage against Va/2. So the initial voltage of the capacitor and Va/2 in figure16 cancel each other and the input sees more ore less an empty capacitor.

This capacitor should have the capacitance of C_t=30pF according to your datasheet. The charging and discharging of the capacitor is repeated with fs=1MHz (aka 1Msps). So if calculate the input resistor R_in=1/(fs*C_t). (Details see here: https://en.wikipedia.org/wiki/Switched_capacitor )This gives you a resistor of 33k. If this resistor is right, the current would be linearly dependent  on the input voltage and aprox. 30 times higher than I measured at 4.5V input voltage.

 

So what is right: your expert, my measurement or your datasheet.

 

there are three things that doesn’t fit:

1. Your expert: “The maximum input current at the input pin is +/-1uA”

2. My measurements: The input current is approx.  -5uA when the input voltage is 0.5V, approx. 0uA when the input voltage is 2.5V and approx. 5uA when the input voltage is 4.5V. The ADC is supplied with 5V, and is running with 1Msps.

3. Your datasheet:

If you start with figure17: The sampling capacitor is charged to Va/2.

In figure16 the sampling capacitor with the initial voltage Va/2 is charged by the input voltage against Va/2. So the initial voltage of the capacitor and Va/2 in figure16 cancel each other and the input sees more ore less an empty capacitor.

This capacitor should have the capacitance of C_t=30pF according to your datasheet. The charging and discharging of the capacitor is repeated with fs=1MHz (aka 1Msps). So if calculate the input resistor R_in=1/(fs*C_t). (Details see here: https://en.wikipedia.org/wiki/Switched_capacitor )This gives you a resistor of 33k. If this resistor is right, the current would be linearly dependent  on the input voltage and aprox. 30 times higher than I measured at 4.5V input voltage.

 

So what is right: your expert, my measurement or your datasheet.

 

Hi Kamal,

Sorry about my misunderstanding. I thought you were interested in the leakage current, not the current that is used to charge the sampling cap. The leakage current refers to the current that can go into and out of the input pin, mostly due to the ESD diodes. Please see Figure 19 in the datasheet for an equivalent circuit of the input that shows these ESD diodes.
There is an equivalent input resistance of about 500 ohms. The thing that makes it impossible to determine the input current by using an equation is that the state of the capacitor is not known. For example, when the input is at 0.5V a charge of 2V is put on the capacitor during the track mode. When the part is in hold mode the voltage on the cap is measured by the ADC. This process will bleed some of the charge from the cap. When the ADC goes back to track mode it once again charges the cap. However, the state of the cap is not known, it hasn't had all the charge taken from it but we don't know how much is left. Also, this will vary from part to part. I measured about 1.8uA at 0.5V, about 1uA at 2.5V and also about 1uA at 4.5V.

Mike

HI,

 

Please find below the comment from my customer.

I do not see what can´t be determined if the datasheet tells the complete truth:

In hold mode the capacitor is charged with Va/2. In track mode this charge in the capacitor is canceld against Va/2 so the world outside sees an empty capacitor at the start of every track cycle.

If you charge an empty capacitor with Vin with the frequency fs the current is I=fs*C*Vin. In out case the current should be I=30uA/V*Vin.

Unfortunately I have measured something different. My current is negative (-5uA) at low Vin, zero at Vin=2,5V and positive (+5uA) at higher Vin.

For me this is a hint that the description of the topology in the datasheet is at least not complete.

regards,

kamal

 

are you sure that the presentation is describing the ADC121S101?

The datasheet of the ADC121S101 says on page 12 in chapter 8.1:

“The control logic then instructs the chargeredistribution DAC to add or subtract fixed amounts of charge from the sampling capacitor until the comparator is balanced.”

So when comparator is balanced, the sampling capacitor has a voltage of -Va/2.

And as you charge the capacitor in track mode against +Va/2, the outside sees an empty capacitor.

 

This does not look like your presentation.

Please investigate how the ADC121S101 works.

Is the datasheet correct or the presentation?