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Is it possible to use only one ADC core of ADC32RF45 and output data on all 8 JESD lanes, so lowering a link speed to one half? For example running one core at a full resolution, highest speed (14 bits @ 2.5 GSPS) with a speed of 6.25 Gbps on each of 8 lanes.
I didn't found it explicitly stated anywhere and it seems to me not being possible according to the datasheet and discussion here.
Thank you for a confirmation,
Jan
Hi Jan,
Device supports maximum of 4 lanes per ADC channel. It can not be programmed to use all 8 lanes for same channel's data.
In your particular example, 14-bits at 2.5Gsps on 4 lanes/channel would mean a JESD output rate of 12.5Gbps/lane.
There is no way to reduce it to 6.25Gbps/lane.
Regards,
Sourabh