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ADS1274: Configuration and operation query

Part Number: ADS1274

Hi

I like to understand more about this ADS1274 which is ideal for 3 channel sensor  (AMR) with 4thl temperature channel , however, I like to reduce current to a minimum as possible via reduced CLK and power-up and down behaviour.

The sample rate for all 4 channel is 40mSec, I like to put this device to power down but unclear how quickly the SD recover from power up and thus ready for next capture and then power down. I mean internal analogue circuit settle time from power up. 

How long is active mode and power down mode?

I'm limited by the clock of 1MHz from MSP430 (SMCLK output from GPIO) to keep power down. How this impact the sampling operating in Sigma Delta using non-standard clock.

I would be grateful for your input based on experience with this device and any issue related to CLK and powerup-down I need to be aware of?

  • Just found the excel tool so I can use 1MHz CLK

    I now need to know power up and down in context of settle time and ready to initiate sample.
  • Hi Richard,

    Thanks for your question.

    Could you provide us with more information about the ADS1274 configuration (i.e. the MODE, FORMAT, and CLKDIV settings)?

    One concern I have is that your data rate is below the minimum supported for this device (1 / 40 ms = 25 SPS). Even if you were using Low-Power Mode, CLKDIV = 1 (where fCLK / fDATA = 2,560), that would mean your input clock (CLK) is only 25 x 2,560 = 64 kHz. The minimum CLK is 100 kHz.

    That said - upon power-up, the time for new data to be ready is a maximum of either 129 or 130 conversions, depending on the interface mode (see Figure 75 and Table 13 on page 29). Is this what you are looking for?

    Best Regards,