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ADS124S06: Practical SPS when switching between ADC inputs and using different PGA gains and IDAC currents

Scott Miller1
Intellectual 515 points
Part Number: ADS124S06
Other Parts Discussed in Thread: ADS1263

The ADS124S06 advertises 4k Samples per second.  However, I want to know what is practical SPS for measuring two inputs at two different frequencies.  The primary measurement I want to measure as fast as possible.  The secondary measurement is a temperature diode, and I only need to measure it occasionally (1-10SPS).  I want to maintain a steady rate for the primary measurement, so I need to run the primary measurement at a speed such that the secondary measurement can be completed in between primary measurements.  However, I don't see anything in the datasheet that specifies the time (or clock cycles) required to change between various  settings needed to switch to the other measurement and back.  

Details: One one set of ADC inputs (primary measurement) I am using one IDAC to drive constant current and measuring the voltage drop across a variable resistance network.  I have a fixed resistor in series with this network, across which I am referencing my REFP and REFN.  Occasionally (1 to 10 times per second) I want to switch to my secondary measurement, which is a voltage drop across a diode.  I can enable both IDACs and the REF ahead of time (and leave them on), and since I have two IDACs I don't have to change the IDAC current setting (even if I had different currents).  So really it comes down to switching to a different PGA gain, switching to the ADC inputs that the diode is attached to, changing the PGA gain, taking a reading (or 3 for the SINC3), switching the PGA gain to the primary measurement gain.  What is the time required to do a secondary measurement and be ready for the next primary measurement?  I'm using the internal clk of the ADS124S06. 3.3V to all supplies. No sleep or low power modes. 

  • 0
    TI__Guru* 97435 points
    Tom,


    In general, you should be able to change channels very quickly with a low amount of overhead. In your case, you are primarily worried about changing PGA gains and there will be a small amount of settling time between gain settings. The PGA generally settles to 10ppm of FS within 50us depending on gain. Basically this means that you would need an overhead of roughly 50us to settle the PGA between settings.

    In addition, over-ranging the PGA may add to recovery time. If you are changing from a channel with a large signal with low gain to a channel with a small signal and high gain, it's best to change the multiplexer first and then change the gain. This way amplifier does not see a case where the PGA is over-ranged. I talked to the designer and he thinks that overload recovery time would be similar to the start up time for the PGA when first enabling it. This time should be somewhere on the order of 200us as a maximum.

    Normally when switching the mux and starting a new conversion, the time it takes to complete the conversion is given with Table 15 in the datasheet using the sinc3 filter (it is Table 13 for the low-latency filter). The time given in the second column does not include the additional programmable delay time set by the DELAY[2:0] bits. I believe that this delay as a default is 55us (with a 4.096MHz external clock). This should account for most any transition time that does not over-range the PGA.

    If you had to enable and disable the reference or IDAC, or if the IDAC output needed to be changed, there may be extra time needed. For example, if the IDAC output was changed from channel to channel, you might have some RC settling with any resistive sensor and reference resistor that had any capacitance for filtering.

    I'm not sure how you want to interleave samples between your primary measurement and the secondary measurement as you described in your post. Just remember there is only one ADC and you are using a multiplexer to interrupt your primary measurement for the secondary.

    Hopefully this answers your question. Let me know if I haven't answered your original post or if you have any other further questions.


    Joseph Wu
  • 0 in reply to Joseph Wu
    Intellectual 515 points

    Hi Joseph, thanks for your response.  Basically, since I am using one IDAC for the Primary measurement, and the other IDAC for the secondary, and not changing those or turning them off (I don't have to deal with REF or IDAC settling times), and if I change the mux first then the PGA (to avoid an overload condition), I could theoritically make my secondary measurement, and switch back to the primary measurement inputs, and PGA in 55us + 55us = 110us, which is less than the 250us that I have to do this in (1/4khz = 250us).  

    Thanks for your help.

  • 0 in reply to Scott Miller1
    TI__Guru* 97435 points
    Scott,


    Actually, I think you may have misunderstood me. Let's take the case where you are making primary measurements at 4kSPS with the low latency period. You're getting data every 250us and you need to break away and make a secondary measurement.

    At that point you make a change in setup that triggers a new conversion. Let's just say that takes 10us (at a min SCLK period of 100ns, it can be done in less, but let's just say you've got more to write).

    The write triggers a new conversion at the new configuration setting for the secondary measurement. Going back to Table 13, the conversion takes 406us (column 2 at the bottom). Also, you'll need to add the programmable delay of 55us. That means total time you'll need 10us for the write, 55us of programmable delay, and then 406us for the conversion. This totals to 471us to get the data out.

    After that you'll need to reset the ADC to the primary measurement. At that point, you'll need to write the configuration and wait for the conversion to complete. That will take another 471us to get the primary measurement. After that successive measurements will complete every 250us (at 4kSPS). So you'll have an extra 120us of overhead to complete any configuration change to the ADC.

    Note that any programmable delay is additional to the conversion time. During the entire data period, the ADC is repeatedly sampling the input to give a single conversion data. Note that at 4kSPS, there are 64 tmod clocks for which the converter is sampled to make one output data.

    This is also illustrated at the bottom of Figure 72. The you'll get data at every /DRDY pulse which is spaced at the data period; at 4kSPS, this is 250us. However, there is extra time for the programmable delay, and ADC overhead (for which time, the output data is calculated from the digital filter result.


    Joseph Wu
  • 0 in reply to Joseph Wu
    Intellectual 515 points

    I guess I did misunderstand!!  So I guess you are saying that even though the only two registers I am changing are the INPMUX and PGA registers (no changes to REF, IDACMAG and IDAC MUX), I still have the overhead of 471us every time I switch the PGA setting and input mux setting  So my maximum primary measurement throughput when switching alternately between the primary and secondary measurements, is roughly 1kHz (when the ADC is set at 4000SPS rate) when you account for the 471us it takes to switch to the secondary measurement (including 55us delay), and the 471us it takes to switch back to the primary measurement = 942us.  (the ADS is set to continuous conversion with low-latency filter).

    Lets say I only want to take my secondary measurement at 1 sample per second, and the primary measurement as fast as I can.  How can I avoid a glitch in the primary data when taking an occasional secondary measurement?  For instance, I want to avoid the case where I take primary measurements at 4000 SPS, getting one sample every 250us.  Then when it is time to take a secondary measurement, I miss 4 primary measurements during the 942us it takes to switch to the secondary mux and PGA settings, take the measurement, and then switch back to the primary measurement mux and PGA.  The problem compounds if I lower the data rate to 1000SPS, as the "first data" becomes 1.16ms times 2 plus the delay of 55us = 2.375ms.  I'll miss 3 primary measurements?  Is there any way around this?  

    I see only 3 ways, and all 3 mean a reduction in the effective output rate from 4khz to 1khz:

    1) Operate in polling mode (set the DATARATE to 4000SPS), poll the ADS for the primary reading once per 1 ms, then when a secondary reading is desired, right after the primary reading, switch to the secondary inputs/PGA setting, take a reading, and switch back to the primary reading inputs/PGA setting, all within the 1ms break between primary readings.

    2) Operate in continuous mode, but add a delay in the PGA register between each continuous measurement (256 setting = 1ms delay), except when equal to 

    3) Operate in continuous mode at 4000SPS, and my microprocessor outputs the primary measurement at:

    a) 1kHz by discarding the 2 out of 3 primary measurements that don't occur ON the 1ms tick,

    b) 1kHz by averaging the 3 primary measurements together and presenting as 1 measurement every 1ms (slightly reduced noise over a))

    c) 4khz by interpolate the two primary measurements before and after the secondary measurement (taken at 1 second interval) to create a pseduo measurement to maintain 4Khz sample rate. One measurement every 1 second (1 out of 4000 measurements) will be a "calculated" measurement.  In my application, 4khz is faster than the frequency response of what I am measuring (around 1.5kHz) so this is not a big deal.  

    Even if I figure out a way to configure my hardware so that I don't change the PGA gain,  It doesn't appear to help me, as  9.5.3.12 says that writing to the 02h (INPMUX) (as well as 03h through 07h) resets the digital filter and starts a new conversion.  

  • 0 in reply to Scott Miller1
    TI__Guru* 97435 points
    Scott,


    I think you understand the problem of interleaving of the different measurements. With options 1 and 3, you'll end up running the device at a faster rate, throwing away some data, and interrupt your primary measurement to take a secondary measurement. This will preserve the output data coming out at a specific data rate. With option 2 (and you left off mid-sentence), I think you were going to set the device to 4kSPS and take the primary and secondary measurement. That would end up with added noise to one primary measurement and you might have a slight delay getting back to the original speed (I haven't yet worked the numbers to check).

    However, there are two other options that I think are worth exploring. First would be to use another ADC for your secondary measurement. If you need less accuracy, you may be able to use a cheap 16-bit ADC for the measurement. Certainly, speed won't be a factor.

    Second, you could look at a different device with a separate ADC. The ADS1263 can be operated at a higher speed and it also has a second on board ADC. It can do 10-channels (but really has an 11-input mux shared between references and the two ADCs).

    Note that the device has a primary ADC with a 32-bit output format, and a secondary ADC with a 24-bit output format. If you're curious, you can look up details here:

    www.ti.com/.../ADS1263


    Joseph Wu
  • 0 in reply to Joseph Wu
    Intellectual 515 points

    Hi Joseph -

    Oops, yes I did accidentally leave off the rest of option 2...it was the end of the day and I had to leave....   The goal with #2 was to run the ADC continually at 4000SPS internally, but artificially output at 1000 SPS in continuous mode by adding the 1ms delay with the PGA delay setting.  Once it is time to take the secondary reading, reduce the delay for just that period so that it, plus the cumulative time it takes to do the switching to take the secondary measurement and back, maintains the 1khz output of the primary measurement.  However, I don't like this because I don't know if I can get the delays to add up so that I maintain an even 1khz output for the primary reading.  So I probably won't go that route.

     Do you feel that noise is a big factor when taking the next primary measurement after taking a secondary measurement?  How many counts (estimate) is the noise?  How many readings does it take for the input to settle?  I.e. where the reading is within the min/max of 3999 of the previous readings (Assuming an identical voltage at the input pins)? What is the noise caused by, just the fact that you don't have the oversampling buffer filled?  

    I have seen the ADS1263, but that is a bit of overkill, plus I am using this in a dual usage application.  Some products based on these electronics need to be ultra low power (slow update rate, 1 second per sample up to 20 seconds per sample).  Some products need to be fast >1kHz.

    So my options are to:

    1) add a microprocessor with 12 bit ADC at this level.

    and/or

    2) since my secondary process is to sense temperature, add an SPI or I2C temperature sensor.

    I was hoping not to add the cost or complexity of either. 

  • 0 in reply to Scott Miller1
    TI__Guru* 97435 points
    Scott,


    I don't think the noise is a big factor between taking primary measurments and secondary measurements. I only mentioned it because changing from 1kSPS data rate for the primary measurement to 4kSPS data for the secondary measurement would have different noise performance. Different data rates have a different amount of noise as Tables 1 through 8 in the datasheet show. Note that the reference is large contributor of noise so if you want to stay at a low noise level, you'll need a reference that has low noise as well.

    I thought that the ADS1263 might be a bit overkill, but since you wanted a high data rate and a second ADC for measurement, I thought I'd suggest it.

    For the temperature measurement, what are you measuring and what accuracy are you looking for? There are plenty of I2C temperature sensors that have accuracy that is ±1°C and ±0.5°C.


    Joseph Wu
  • 0 in reply to Joseph Wu
    Intellectual 515 points

    Hi Joseph- 

    Gotcha.  I think we both understand now that I am not changing internal SPS for my option #2 (or #1 or #3 for that matter), and that using your statement on Oct 6, switching the inputs and PGA will not generate extra noise.  Therefore, with #2, I CAN achieve a 1kHz effective primary measurement while occasionally sampling the secondary measurement, and also options #1 and #3 will succeed without extra noise.

    However, what do I do with the statement in 9.5.3.12 says that

    "writing to the 02h (INPMUX) (as well as 03h through 07h) resets the digital filter and starts a new conversion"?

    Wouldn't I get extra noise after this event, as I am resetting the digital filter by writing to WREG 02h and 03h?  Or is the time needed to fill the filter already accounted for in the 406us (Table 13 Column 2 )?

    Regarding temperature measurement, 0.5C is plenty accurate.  This seems like the less complicated method....

    Thanks,

    Scott

  • 0 in reply to Scott Miller1
    TI__Guru* 97435 points
    Scott,


    You shouldn't get extra noise writing to 02h or 03h. As long as the analog input is a settled value, the output data shouldn't have any extra noise.

    After the configuration register is written and the ADC is properly set, the digital filter accumulates a value based on the input voltage. If the input isn't settled and continues to change, the final data from the digital filter will also be off. If the input is already settled to it's final value and doesn't move, then the final data from the digital filter will be correct.


    Joseph Wu