This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS1294R: VREF-buffer capacitors

Part Number: ADS1294R

This topic is an add-on to my previous post regarding an external reference. A short intro to the problem: A low-power battery-driven system shall be utilized to measure respiration with ~10Hz. To minimize power consumption the ADS is only turned on for measurement and then powered down again. The internal reference is too slow (150ms) to follow this on/off-cycling, so I need an external one (comparable to the recommended design as shown in the ADS129xR datasheet).

Regarding pwr consumption I cannot ignore the fact, that the buffer caps are always discharged by the 10k input resistance of the VREF-pin. My measurements revealed that just turning the ext. reference on and re-charging that buffer-caps requires almost 25% of the total charge from the battery within a single sampling cycle.

Example for a single sample - the yellow line is the current measured on a 1.7R-shunt from the battery and the pink line is the time-integral. The reference is turned on and gets ~1.5ms to settle, then the ADS is activated and 6 samples are taken (spikes arise from MCU running on full speed during SPI-communication). Afterwards the ADS is powered down again. Notice the current-spike for the first 200us which results from re-charging the 10uF reference caps.

The internal reference circuit (datasheet fig 31) has 22uF for the VCAP1 (ok, that's the low-noise not-yet-buffered voltage) and another 10uF at the VREFP-pin.

If I understand the ext. ref. circuit (fig 32) right then the main topic of that circuit is to buffer and (!) react on a dynamic (!) load of the VREFP-pin. However, as this reference voltage has to be utilized by up 4 (or 8) Sigma-Delta-ADCs I ask myself if that reference is internally buffered (the input has a 10k resistance which has to arise from something). In that case I could reduce the 10uF to 1 or 2uF and use e.g. 100R instead of 10R for the op-amp-output (I know that this filtering is only necessary for the opamp's own noise).

Any ideas or suggestions?

  • Hello Jurgen,

    I believe I've answered some of your questions on the other thread. :) I will add some additional comments here regarding the reference input impedance and the need for the external capacitor between VREFP and VREFN.

    When using an external reference voltage, the internal buffer is powered-down. Your external reference drive circuit will interface directly with the switched-capacitor reference sampling circuit. This input stage is relatively low impedance and is a function of the sampling capacitor value and the switching frequency, which is equal to the modulator sampling frequency (fMOD). The modulator frequency is a fraction of the input master clock (typically 2.048 MHz) and depends on whether you are using High-Resolution or Low-Power Mode.

    The external cap is needed to provide instantaneous charge to the internal sampling caps. The load demanded by the internal sampling circuit depends on the number of active channels and fMOD. Since this is a relatively low-speed application, you probably could reduce this cap to 1uF without much consequence. I would also recommend adding a 10-nF cap in parallel.

    If you're looking to filter out the reference IC noise with a low cutoff LPF, I would suggest buffering the LPF output with a low-noise amplifier. The reason is that with each sample, the transfer of charge to the internal reference caps will pull current through that series 100-ohm resistor. This will create a voltage drop and translate to a larger gain error in your measurement unless you calibrate the system.

    Best Regards,