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ADS54J60: ADS54J60 max data line rate

Part Number: ADS54J60

Hello

Could you please confirm that in a LMFS=8224 (no decimation) configuration the maximum SERDES bit rate is 5Gbps/lane?

The following calculations are based on the numerous examples.

ADC_data_rate = M*ADC_Sample_rate/decimation, where M = 2, ADC_Sample_rate = 1 GHz, decimation = 1

ADC_data_rate = 2*1G/1 = 2Gb/s

frame_clock = ADC_data_rate/S

frame_clock = 2Gb/s /4 = 0.5 G/s

Lrate = M*S*N*10/8 *frame_clock/L, where N = 16, L = 8

Lrate = 2*4*16*10/8*0.5G/8 = 10Gb/s

while the datasheet specifies 5Gb/s

Am I missing something?

Thank you

  • Andrei,

    The lane rate = (Data rate * 10 * F) / L  = (1G * 10 * 2) / 4 = 5G.  This mode uses 4 lanes per ADC.

    Regards,

    Jim

  • Thank you, Jim.

    Is this equation common for all ADC JESD204B devices?
  • Andrei,

    Most of them unless they are running with 12 or 14 bits and packing the data. Then it can get a little more complicated.

    Regards,

    Jim

  • Sorry for disturbing you again, Jim

    I tried to calculate the lane rate for LMFS=4211, 1GSPS, no decimation configuration using your equation and got

    The lane rate = (Data rate * 10 * F) / L = (1G * 10 * 1) / 2 = 5G, while the value in the datasheet is 10G (table 10).

    Is it correct?

    **
    Where can I find information about how to define the lane rate for ADS54J60 for any LMFS config/decimation/Sample rate?
    By the way, what is "10" in the equation?

    Thank you very much

    **

    Update, just in case

    I found that the eq. below is used to calculate the lane rate:

    Lane Rate = (M x N' x 10/8 x Fout)/L,

    where Fout = fadc_clock/Decimation ratio

    if LMFS = 4211 and fadc_clock= 1G => the lane rate is : 2 * 16 * 10/8 * 1G/4 = 10G

    if LMFS = 8224 and fadc_clock= 1G => the lane rate is : 2 * 16 * 10/8 * 1G/8 = 5G