Hello:
On page 14 of the datasheet, there are some diagrams for the timings of the frame sync slave interface. In particular it is stated the that frame sync should be a least 2 clock cycles.
Is it OK if that is stretched to a longer period. I plan on use 2 devices in a daisy chain mode. My micro controller can either output a 1 clock cycle framesync or 50% duty cycle (32 clocks) framesync. I want to verify the 50% duty cycle case is OK before we complete out PCB.
