Other Parts Discussed in Thread: LMK04828, DAC37J84,
hello, guys
I plan to design a board with 3 ADCs and a DAC dac37j84 , the pll is lmk04828, The 3 ADCs chip is required to work Synchronously, so I think there are 4 groups of clock should be matched length, is there any problem?
The pll used a 122.88MHz vcxo， how to set the frequency of Dclk3 and Dclk_dac?
