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ADS5263EVM: High Speed Connector Adapter?

Hannah Fogel
Prodigy 70 points
Part Number: ADS5263EVM
Other Parts Discussed in Thread: TMS320C6678, , ADS5263

I have recently bought the ADS5263EVM, hoping to be able to interface it with a DSP board for an ultrasound imaging application. Since the ADC has serial LVDS outputs, I am under the impression that it should be able to interface with the TMS320C6678 EVM (TMDSEVM6678L), which supports serial rapid IO. The problem I am having is with the physical connection of the two boards. Does anyone know of a way to connect the high speed ADC connector on the ADS5263EVM with the 170 pin AMC B+ connector on the DSP EVM? Does TI (or any other manufacturer) make some sort of adapter? The only kind of adapters I have found are ADC- HSMC or FMC to connect to FPGAs. 

Any suggestions would be much appreciated.

  • 0
    TI__Expert 4145 points

    Hi Hannah,

    The ADS5263EVM uses this connector. TI doesn't manufacture any other connectors besides the ones you found for the FPGA.

    One reason is because of the speed of the serial LVDS data stream coming over the connector. The interface can run up to 1Gbps.

    I am not familiar with the TMS320C6678 but deserializing serial LVDS data at that speed is usually done with FPGAs.

    TI also manufactures the TSW1400EVM to pair with the ADS5263EVM during evaluation.

    Sincerely,

    Olu

  • 0 in reply to Olu Sodipe
    Prodigy 70 points
    Thank you, Olu. This document: www.ti.com/.../slaa545.pdf details capturing data from a high speed ADC using the FPGA on board the TSW1400. Do you know if any FPGA with HSMC interface could be used directly with the ADC EVM (i.e. without needing the TSW1400)?

    Hannah
  • 0 in reply to Olu Sodipe
    Prodigy 70 points
    Hi Olu, I have a couple more questions regarding your last post.

    1. You mentioned that "the interface can run up to 1Gbps." Is there a way to control the speed of the data transfer on the EVM?
    I don't have the need to read the digital data as fast as 1 Gbps for my application.

    2. I am looking into designing my own board to interface the ADC with a DSP (TMDSEVM6678L). So having the corresponding connector (QSH-060-01-L-D-A-RT1) that the TSW1400 has at one end, and the card-edge connector for the DSP at the other end. I noticed on the ADS5263EVM that the traces going into the connector are not straight lines. I am guessing that the purpose of the squiggles in the lines is to ensure that they are all the same length for timing purposes? Could you confirm that this is indeed the reason for them?

    Thanks again,
    Hannah
  • 0 in reply to Hannah Fogel
    TI__Expert 4145 points

    Hi Hannah,

    The main FPGA vendors are Altera and Xilinx. Altera development kits typically come with the HSMC connector and Xilinx boards with the FMC connector. Both connectors have adapter boards available from TI here and here.

    To better understand the serial LVDS interface on the ADS5263EVM, Page 39 of the datasheet is a good starting point. Essentially, bitrate is determined by ADC frequency and resolution.

    Just as you guessed, the squiggly lines are used to match trace lengths and make sure all LVDS output lines are approximately equal to avoid phase delays.

    This is critical because in addition to the digital output data, the ADS5263 also generates a bit clock and frame clock that are usually used to deserialize the serial LVDS data on the FPGA side--data, bit clock, and frame clock are synchronized as per Page 39 of the datasheet.

    Sincerely,

    Olu

  • 0 in reply to Olu Sodipe
    Prodigy 70 points
    Update: Yordan from the Keystone Multicore DSP Forum explained that the DSP and ADC cannot be connected directly, even with a custom adapter board. The solution will be to use an FPGA between the two devices, as shown below:

    ADC <==connected through LVDS==> FPGA <==connected through SRIO interface==> TMS320C6678