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AFE5801: Questions about the input clock of AFE5801

Part Number: AFE5801

I don't understand the meaning of "The common-mode voltage of the clock source should match one of the clock inputs of the AFE5801 (VCM) which is set internally using 5kΩ resistors, as shown in Figure 39." in application notes of AFE5801. I use multimeter to detect the CLKP and CLKM, then find that all of them has a common mode voltage about 0.975V. 

Can i use LVDS differential clock like this figure as the input clock and directly put it into the CLKP and CLKM pins?

  • Hi there,

    As I mentioned here, add 0.1uF DC blocking capacitors in the path of the input clock signals to remove the DC bias from the the incoming LVDS signal. 

    The VCM for the clocks mentioned in the datasheet is likely different from the one specified at 1.6V. Adding the capacitors makes it irrelevant because the common-mode voltage of the differential signal after the capacitors should be 0V and can now be set to the internal Vcm for the CLKP/M pins.

    Sincerely,

    Olu