Hi
The datasheet (SBAS671B) page 48 section 9.3.2 states "the device clock inputs can be driven differentially or single-ended, with little or no difference in performance between them." The following page states "However, for best performance the clock inputs must be driven differentially". Which statement is correct, and what is the performance improvement for using a differential clock?
Hi Graeme,
Please see the last statement you quoted on page 49. "However, for best performance the clock inputs must be driven differentially,
thereby reducing susceptibility to common-mode noise." Since both, single-ended and differential, are valid clock inputs, I believe the data sheet is trying to make sure the user knows differential is the preferred method. The performance improvement is increased noise immunity for the clock signal as it propagates from the clock source to the ADC.
Also, please take a look at the latest revision of the data sheet (SBAS671C) that is available here 
Regards,
Dan
