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ADS7852: data comes back shifted by one channel

Part Number: ADS7852

Hi Guys,

My customer has a problem with the data they are getting back from the part. Have you seen this behavior before?:

We had a bit of a problem with the prototype board implementing ADS7852.

The problem then was the values for each of the 8 channels were correct, except they were shifted by one channel.

Instead of ch0, 1, 2, 3, 4, 5, 6, 7, we were getting ch7, 0, 1, 2, 3, 4, 5, 6,

 

I rechecked all the timing with the scope, verified that it was correct and matched the datasheet specs.

The software engineer changed the firmware to read each channel twice from the ADS7852 and now it works correctly.

Instead of reading ch0, 1, 2, 3, 4, 5, 6, 7; now we read ch 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, discarding the first reading of each channel, keeping the second.

 

This appears to work, but moving forward we’d like to understand why. We want be sure we’re not missing something to avoid any problems as we move into production.

 


Thanks,

Brian

  • Hi Brian,

    For this device, the converter operates one cycle behind the multiplexer which results in a single cycle delay as you've observed.

    The timing diagram on page 11 of the datasheet shows this delay. On the busy and address bus signals there is text indicating that for a giving conversion frame, the converter is converting sample n, while the mux is switched to sample n+1.