My customer is using DAC5681Z with Virtex 7 FPGA. Is there a reference code for DAC5681Z with Virtex7? If so, please share same.
Customer started with funcitonal testing: For testing they feed a 16-bit ramp @120MHz -
Observations:
1.1 digital data is reaching the input pins of the DAC.
1.2 120 MHz DCLK is reaching the DAC.
1.3 30 MHz signal observed at the output(similar to sinusoid). This signal was present irrespective of the input.
1.4 Then we tried to configure the DAC via serial interface. No improvement observed
Could you please help debugging & making setup running?
Neeraj, Jim: Have sent schematic to you over mail.
