DEARS.
We designed our own board on the ADC32RF45.
I have a question about data sheet "8.4.2.3. JESD204B Frame Assembly in Bypass mode"
ADC32RF45 Core processes data in 14 bits.
However, when data is transmitted to JESD204B, the lower 2 bits are discarded and transmitted to 12 bits.
If the 12-bit processing method is correct, what are the effects on SNR, SFDR, and test conditions?
Thank you
