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PGA411-Q1: questions about DEV_STAT5 and DEV_STAT6

Walsh
Intellectual 950 points

Part Number: PGA411-Q1

Hi,

I met two questions about DEV_STAT5 and DEV_STAT6,

1. I can read angle via accessing DEV_STAT5 by SPI. But i can't read speed via accessing DEV_STAT6 by SPI.

2. When does the DEV_STAT5 and DEV_STAT6 update the data? How to update? Does they have data lock function?

Thanks.

Walsh

  • 0
    TI__Mastermind 23810 points
    1. That is strange. DEV_STAT6 should be storing the velocity. Do you know about what speed you are running when trying to read DEV_STAT6? What RPM should it be reading? Are you in 10 bit or 12 bit mode?
    2. The data is loaded into the SPI buffer within 1 to 2 clock cycles after the rising edge of NCS. So if you send a SPI command reading DEV_STAT5, the data is loaded at the end of that frame, when NCS transitions to high. Then during the next SPI frame, the data from the SPI buffer is sent out on SDO.

    Thanks,

    -Clancy
  • 0 in reply to Clancy Soehren
    Intellectual 950 points
    Hi Clancy:

    Thanks.
    1. Does DEV_STAT5 have latched function? for example, When trigger latched function at Time A, I can read the angle data value (which are latched at Time A) at Time B.

    2. What is the relationship between the value of DEV_STAT5 register and the output data from parallel data? for example, The data output of parallel data is via PIN ORD0~ORD11. DEV_STAT5 register is via ORDANGLE bit.

    Thanks,

    Walsh
  • 0 in reply to Walsh
    TI__Mastermind 23810 points
    Walsh,

    1. The DEV_STAT5 data is latched within two clock cycles after the rising edge of NCS. That data will then be transmitted over SPI during the next SPI frame. You can use this fact and control when the rising edge of NCS is. For instance, instead of releasing NCS immediately after the SPI frame, you could wait until right before the next SPI frame, so that the data is as current as possible.

    2. The value that is latched in DEV_STAT5 will be the same as what is output on the ORDx pins. The difference is that the ORDx pins are updated at a rate of 10MHz as long as the INHB pin is high.

    Thanks,

    -Clancy