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ADS8688A: SDO Data Format

Part Number: ADS8688A

Table 14 of the ADS8688A datasheet shows 16 bits of data written in to the ADS8688A and 16 bits read from the part as detailed in Figure 91 (and Figure 100 and 102).

Setting the "SDO data format bits" in the Feature Select Register then continues the SPI transaction with 9 more bits read from the ADS86888A. So if I understand this correctly, the total SPI transaction is 41 bits long. 

Can the transaction be cut short--say at 40 bits (an 8 bit boundary) without causing troubles, just the final bit not sent? 

Or could the transaction be extended to 48 bits? Would the ADS8688A simply hold SDO low during the extra SCLKs?

Thanks,

Bruce

  • Hi Bruce,

    We are looking into this and will get back to you.
  • Hello Bruce,

    Figure 91 shows a general serial communications timing diagram.
    Figure 100 and 102 are specific examples on how to use auto and manual channel select.

    You will never have a transaction with a number of bits that is not divisible by 8 on this device. The size of the data output frame varies depending on the register setting for the SDO format. Table 13 in datasheet describes the SDO data format . (edited 12/15/17)


    Table 12 and table 13, in reference to table 9, show, what the feature select registers thre are, what SDO data formats are avaiable, and what bits are needed to be addressed to program the feature select registers, respectively.

    What sdo data formart do you want to use?
    I would suggest reading the registers after writing them to make sure thet are programmed correctly.

    Regards Cynthia

  • Howdy Cynthia,

    I thought a transaction with an odd number of bits was ... odd. 

    The intent was to use SDO = "011", the final line in table 13, that is all of table 14. 

    16 bits of conversion result

    4 bits of channel address (useful check, especially in auto conversion mode)

    2 bits of device address (not using daisy chain, so these are not very meaningful) 

    3 bits of input voltage range (a continued check that the programming is correct) 

    That keeps adding up to 25 output bits for me. 

    I will also be reading each register after writing, but there is a desire for continuous verification. 

    Regards,

    Bruce

  • You are Correct Bruce,

    I spoke too quickly, this device's data size on its output does vary, I will correct my previous post.

    For your given format, you can do both situations you presented.
    If you decide to cut the last bit, be sure to toggle CS after the SDO data frame. If a new conversation is not started (CS is not toggled) the last bit could be carried over and cause reading errors.
    If you decide to extend the data frame, the extra bits will be read as 0. This can be confirmed in the datasheet, on page 39, "The SDO outputs 0 on subsequent SCLK falling edges until the next conversion is initiated."

    Hope this helps
    Cynthia
  • Thanks Cynthia. That helps clarify the part's behavior for me. Bruce