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DAC38J84: Channel consistency

Part Number: DAC38J84

ADC chip will give a Channel consistency parameter,e,g,

any such parameters for DAC38J84(4 independent channel mode with real input)?

  • 3821.multiple DAC sync.pdf

    Min,

    The output delay with respect to the sample clock is shown in section 6.9. If all the DAC's are running in subclass 1 mode and all receive the device clock at the same time, the outputs should all be valid within about 2ns of the falling edge of DAC clock. See the attached document for actual test results using two DAC EVM's synchronized to the same reference source.

    Regards,

    Jim