ADC12D1620QML-SP: SDO ibis model

Itai Eden

Intellectual 310 points

Part Number: ADC12D1620QML-SP

Hello,

I'm trying to simulate the SDO signal using hyperlinx.

I'm using the ibis model of the ADC12D1x00.ibs model.

for some reason during signal changes (low to high & high to low) the signal transition is far from being smooth.

see attached file.

I tried different series transistors and only when I tried very large resistors (200ohm) the signal transition became smooth.

it suggests that it is not an issue of impedance matching (the TL impedance is 50ohms), but rather a driver issue.

Does this make sense? is the ibis model correct?

regards,

ItaiAD12D1620_Hyperlinx_Simulation.pdf

over 7 years ago

0 dBrock over 7 years ago

TI__Genius 12780 points

Hi Itai,

We are taking a look into this, and will be back with you soon.

Regards,

Dan

0 Itai Eden over 7 years ago in reply to dBrock

Intellectual 310 points

ANy progress with the SDO IBIS model check?

Regards and happy holidays
Itai

0 Jim Brinkhurst1 over 7 years ago in reply to Itai Eden

TI__Mastermind 44680 points

Hi Itai

I haven't received any information from the modeling team yet.

Since SDO is sampled by the SPI master the smoothness of the rising and falling edges isn't critical. I would adjust the termination resistance to achieve a fast enough overall slew rate to work with the SPI clock frequency you are planning to use. If the 'roughness' of the waveforms is real it won't have any impact on communications anyway.

Best regards,

Jim B

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ADC12D1620QML-SP: SDO ibis model