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ADC12DJ3200EVM: Data capture

Part Number: ADC12DJ3200EVM
Other Parts Discussed in Thread: TSW14J57EVM,

HI,

I'd like to be able to initiate data capture and save data on command from the ADC12DJ3200EVM (most likely using LabVIEW). Is this possible with the TSW14J56EVM /TSW14J57EVM ? I'd like to avoid using the HSDC Pro software unless I am able to interface to it from my LabVIEW code. If not, what would you recommend to accomplish this?

Also, I saw in another forum post that:

"The ADC12DJ3200EVM+TSW14J56EVM combination has limitations on maximum JESD204B data rate of around 10.8 Gbit/sec. This will limit the maximum ADC clock rate in the 12 bit modes of operation (JMODE0, JMODE2) to 2.7 GHz clock rate."

Is that because of the on board clocks? Could I run at max speed supplying external clocks?

Thanks,

Jeremy

  • Hi Jeremy,

    We currently only support HSDC Pro for capturing data from our FPGA capture cards (TSW14J56EVM,TSW14J57EVM...), but we do offer tools to automate HSDC Pro via MATLAB, Labview and others.

    I'm certain that you won't have any issues with JESD data rate at 3.2 GHz sample clock when using the ADC12DJ3200EVM with the  TSW14J57EVM, so it is recommended that you use these two EVMs together.

    Using the TSW14J56EVM with the ADC12DJ3200EVM at JESD data rates above 10.8 Gbps may work to a certain point, but is not recommended. Using external clocking will not address this issue.

    Best Regards,

    Dan

  • Ok thanks.  I looked through the LabVIEW example and It looks like this will work.

    I want to just confirm that I will be able to capture the maximum data length (524288) with all 16 lanes @ 6.4Gbps.

    Thanks,

    Jeremy

  • Hi Jeremy

    The current TSW14J57EVM capture firmware supports good captures in JMODE1 (single input, 12 bits, 16 lane data output) up to 262144 sample depth.

    In JMODE3 (dual input, 12 bits, 16 lane output) the max sample depth is 131072 samples per channel.

    Best regards,

    Jim B

  • What about mode 0 or 2?

  • Hi Jeremy

    The same TSW14J57EVM capture depth limits apply for JMODE0 and 2 as for 1 and 3.

    The TSW14J56EVM firmware can do deeper captures (>524288 samples), but 16 lane JMODEs are not available, and max clock rate is around 2.7 GHz for JMODEs 0 and 2.

    Best regards,

    Jim B