I came across with this issue that the ADS1298 requires at least 4 clock cycles after the 8th bit is clocked in for the chip select pin to go inactive (link below is a closed thread without answer on the same matter).
When using the TMS320C55xx devices, the chip select goes inactive after 0.5tc-2ns where tc is the spi clock period. The condition to read the ADS1298 is only met when the spi clock is less than 250KHz which is quite useless as you cannot do much with that speed (not even sure you can achieve a 1ksps speed)...
So the solution to this is incrementing the time after the last clocked bit until the chip select goes inactive. The ADS resets buffers when the chip select goes inactive (I think, and I think this is why it needs 4 clock cycles to decode the message before deleting the buffer).
The way I managed to solve this was to send a dummy bit at the end of the command. So now to write a command to the ADS I send a 2 characters frame, one with 8 bits that clocks out the command and one of 1 bit. This keeps the chip select inactive for longer and the ADS does not get confused (this may be because the extra bit gets ignored as the chip select is pulled inactive immediately afterwards).
There it is, now everything works like a charm. Just wanted to post this because it took me a good while to realise what the problem was and then a few hours to resolve. I think it is a bit stupid that two very popular devices from the same manufacturer have such compatibility issue. Hope this gets looked at.
