DAC8734: Large offsets in DAC8734 outputs.

Peter,

To be clear, you did not observe this excessive offset prior to reworking the board? What sort of rework was performed? With hand-soldering there is potential for excessive heat which can introduce errors, but something of this magnitude is a bit larger than I would expect.

Could you measure the reference voltage as well? Do you see any other abnormal error parameters? For example has the gain error also shifted considerably?

If the unit was performing well consistently prior to the rework I hesitate to commit to the power supply sequence being the root cause unless something modified in the rework process would have had an impact on the supply sequence.

The DACs worked fine before the rework.  We have a gain amplifier after the DACs.  The rework was on the other side of these gain amplifiers, hand soldering, changing resistors and capacitors.  I did check the reference voltage, and it was fine.  We are only using DAC0 of the quad.  The other 3 DACs are not connected to any load circuit but are configured for bipolar gain=4 operation, and they were also affected.  For DAC0, the error seems to be mostly an offset.  The gain seems to still hover around 1.  After external calibration, the remaining error at 0V is actually ~22mV (180mV/8.25) because the 180mV error is after the gain stage, I forgot to account for that.

Thanks,

Peter

Peter,

Thanks for the information.

Generally speaking high precision analog devices contain internal programmable memory which contain various trim coefficients for trim circuits which are "tuned" during production of the device. One of the things that can happen when a recommended power-supply sequence is violated is that these codes are not loaded into the trim circuits properly, which can lead to parametric degradation. Since the reference looks good and the gain error of the outputs look good (within spec), it seems like the power supply sequence isn't causing you issues - or that there is a marginal signature of the power supply sequence which we can only observe in the offset error parameter.

Issuing a reset command can sometimes serve as a work-around to power supply sequences which violate the recommended sequence, but it depends on how "deep" the reset is implemented. Many times the reset is only what I would call a "surface level" reset where the register content which is visible to an end-user is re-configured to their start-up default values. For the reset to also rectify these memory-related topics, they need to issue a complete POR. I am not sure based on the datasheet which is the implementation for this device, but I can check for you so we can potentially completely rule out supply sequencing as a problem.

The additional detail that the hand-solder rework has shifted the error suggests to me that the heat itself potential introduced this error. If the DACs worked fine before (presumably with the same power supply sequence?) and now the issue is present, with no other evident symptoms, this is the best hypothesis I can provide at this time. Are you able to confirm that nothing about the supply sequence was impacted?

Thanks for the thorough analysis.  I have since changed the power sequence to follow the sequence in the data sheet, but the offsets remained.  I do not think heat from the rework can affect the DACs because the area being reworked is 2 to 4 inches away and circuit-wise on the other side of an amplifier.  I am about to replace one of the DACs later today to see if that fixes the offsets.  If it does, can I send the bad one to you for analysis.  It will be good for us to find the cause so that it does not happen again.

Thanks,

Peter

Hi Peter,

I was also able to confirm with the Design Team this morning that the HW Reset does not reload the internal memory for the trim circuits, so we could not use this means either as a method of ruling out the power supply sequence but it does sound like you've performed some other experiments to validate that.

Let's see what comes from your study with the new unit.