TSW30H84EVM: HELP Arria V RF Development Kit Reference Design

Sergio,

I think you can check out the E2E forum for some previous experiences of the Arria V RF development kit

one reference document is below:

/cfs-file/__key/communityserver-discussions-components-files/73/3157.Altera_2D00_TI-Demo.docx

-Kang

Hi Sergio,

These files actually belongs to Altera and I am not sure if TI has the right to distribute these files. TI and Altera worked on this platform almost 5 years ago. TI owns all the RF front ends while Altera owns the FPGA development code. I am not sure if Altera can authorize TI to release files on our own.

I can check with one team member if he has the FPGA source code or .sof and also if we can release it on our side without Altera's permission. I recommend that you check with your local Altera distributor to see if Altera can release this to you. Keep in mind that Altera owns all the FPGA development effort.

-Kang

i undestand

i will contact Altera Support

but if you could verify if you guys can share those files  it would be great


Thanks for your help

Sergio,

just want to update you that we are in the process of making sure that the files that we found are indeed what you need. We have not forgotten about you. Should be able to provide some update within the next couple of days.

-Kang

Thank you, Kang

I'll be waiting for the updates


Regards

Sergio Juarez

Sergio,

The info I sent earlier to you is what Kang is referencing. The link for this is shown below.

Regards,

Jim

txn.box.com/.../797ctivhkyll0dyrm1zp29n6i9rt490v

Hello 

Im doing some functionality tests

but i think the configuration files for the TSW1266 and TSW30H84 
are not the ones i need

Im trying to run the ADC captured data straight to the DAC 
it works to a certain level (only PRBS changes the DAC output)


but it doesnt work i believe its caused by wrong configuration files

is there a special config for this task?

Thanks

Sergio,

Are you having trouble with the ADC or DAC? Make sure to run all GUI's as system administrator. Are the files attached what you are using for a setup procedure and config files?

Regards,

Jim

3566.Altera-TI Demo.docxTSW30H84_307M_demo_new

ADS5402 Registers:

0x00 0x0004
0x01 0x0002
0x02 0x0780
0x2c 0x0000
0x38 0xffb0
0x3a 0xc81b
0x3c 0x2aa8
0x3d 0x1554
0x3e 0x2aa8


LMK04800 Registers:

0x00 0x400a811
0x01 0x000a801
0x02 0x400a819
0x03 0x000a802
0x04 0x000a80a
0x05 0x000a819
0x06 0x1000000
0x07 0x0400000
0x08 0x0000800
0x09 0x2aaaaaa
0x0a 0x4880216
0x0b 0x40c0880
0x0c 0x0d8600d
0x0d 0x1d81040
0x0e 0x0900000
0x0f 0x4000400
0x10 0x00aa820
0x18 0x0000006
0x19 0x0080800
0x1a 0x47d4000
0x1b 0x08000c0
0x1c 0x0020180
0x1d 0x0040030
0x1e 0x000002e
0x1f 0x0000000


LMH6521 Registers:

0x1 0x2a
0x2 0x2a

Hi, Jim

im using those config files

i did some testing with a RAM for the DAC and it worked fine with the files you shared with me
however in that project the ADC is not used so im modifying the code to adapt it for the ADC instead of the RAM

then i tried to implement the ADC and it seems its not working properly (i have zero experience working with ADC boards) i think is a sync issue because the ADC pll never latches 

maybe its an implementation issue
how can i sync both boards?

my test setup is LO of 2140 MHZ and RF signal of 10MHz
and my goal is to obtain the same signal at the dac output 

Am i missing something?


Thanks

Sergio,

I would suggest you follow the TSW1266EVM User's Guide and get an output out of this board first. Do you have a TSW1400EVM or a TSW1405EVM to capture data from this board? If not, you can order one of these from the TI website. I would suggest the TSW1405EVM as it is much cheaper.

Regards,

Jim

Hi Jim

Unfortunately, we cant order another board i already talked to my team and its not possible

I managed to get the ADC working but its not behaving as i expected (it seems it has some bugs)
currently im checking all the timing requirements to see if the sample capture is properly done

However i hace some questions about both boards set up

Following the instructions from the ALTERA TI DEMO
Currently to sync both boards i have the TSW30H84J5 “clkout6p” connected to TSW1266 J8 “CLKIN”

is this correct?

Sergio,

I would suggest you bring in a 100MHz clock to J8, and program the LMK to run in clock distribution mode. Have the output clock divider of the ADC clock set to "1". This should provide a 100MHz clock to the ADC. Next bring in your RF signal and offset it by 10MHz from the LO source. This should then send a 10MHz signal out of the mixer to the ADC. Verify this with a scope probe at the ADC input pins. This should then be captured by the FPGA board and verified. What are you using to verify the digital output of the ADC, Altera Signal Tap?

Regards,

Jim